Preliminary LumiCAL FEE Specification Presented by Alexander Solin NC PHEP FCAL collaboration meeting, February 12-13, 2006, Krakow (INP PAS),

Slides:



Advertisements
Similar presentations
Electronics for large LAr TPC’s F. Pietropaolo (ICARUS Collaboration) CRYODET Workshop LNGS, March 2006.
Advertisements

KLOE II Inner Tracker - FEE Status Antonio Ranieri RD51 Collaboration Meeting Paris October 2008 INFN-Bari S ervizio E lettronico L aboratori F rascati.
E. Atkin, E. Malankin, V. Shumikhin NRNU MEPhI, Moscow 1.
R&D for ECAL VFE technology prototype -Gerard Bohner -Jacques Lecoq -Samuel Manen LPC Clermond-Ferrand, Fr -Christophe de La Taille -Julien Fleury -Gisèle.
Specific requirements for analog electronics of a high counting rate TRD Vasile Catanescu NIHAM - Bucharest CBM 10th Collaboration Meeting Sept 25 – 28,
Anode Front-End Electronics current status Presented by Nikolay Bondar. Fermilab. 09/08/00.
Victoria04 R. Frey1 Silicon/Tungsten ECal Status and Progress Ray Frey University of Oregon Victoria ALCPG Workshop July 29, 2004 Overview Current R&D.
Snowmass 2005 SOI detector R&D Massimo Caccia, Antonio Bulgheroni Univ. dell’Insubria / INFN Milano (Italy) M. Jastrzab, M. Koziel, W. Kucewicz, H. Niemiec.
1 H-Cal front-end ASIC Status LAL Orsay J. Fleury, C. de la Taille, G. Martin, L. Raux.
August SGSS front end, Summary August 2008 Edwin Spencer, SCIPP1 SGST Preview SCIPP, UC Santa Cruz Andrey Martchovsky Gregory Horn Edwin Spencer.
RSH Front End Electronic R. Beaujean, S. Böttcher Kiel Nov 07, 2005.
5ns Peaking Time Transimpedance Front End Amplifier for the Silicon Pixel Detector in the NA62 Gigatracker E. Martin a,b J. Kaplon b, A. Ceccucci b, P.
Design and test of a high-speed beam monitor for hardon therapy H. Pernegger on behalf of Erich Griesmayer Fachhochschule Wr. Neustadt/Fotec Austria (H.
A.Kashchuk Muon meeting, CERN Presented by A.Kashchuk.
Requirements to RICH FEE Serguei Sadovsky IHEP, Protvino CBM meeting GSI, 10 March 2005.
Electronics for first beam tests of diamond sensors Presented by: Igor Emeliantchik NC PHEP, Minsk:Konstantin Afanaciev, Igor Emeliantchik Alexander Ignatenko.
Various Topics Related to FEB Liang Han, Ge Jin University of Science and Technology of China Dec.21,2013.
14-5 January 2006 Luciano Musa / CERN – PH / ED General Purpose Charge Readout Chip Nikhef, 4-5 January 2006 Outline  Motivations and specifications 
Oct, 2000CMS Tracker Electronics1 APV25s1 STATUS Testing started beginning September 1 wafer cut, others left for probing 10 chips mounted on test boards.
Performance test of STS demonstrators Anton Lymanets 15 th CBM collaboration meeting, April 12 th, 2010.
FCAL R&D in Minsk Group: Sensors and Electronics FCAL Collaboration MPI Munich October 17, 2006, Munich, Germany Presented by Igor Emeliantchik.
Building blocks 0.18 µm XFAB SOI Calice Meeting - Argonne 2014 CALIIMAX-HEP 18/03/2014 Jean-Baptiste Cizel - Calice meeting Argonne 1.
Fully depleted MAPS: Pegasus and MIMOSA 33 Maciej Kachel, Wojciech Duliński PICSEL group, IPHC Strasbourg 1 For low energy X-ray applications.
Progress on STS CSA chip development E. Atkin Department of Electronics, MEPhI A.Voronin SINP, MSU.
Peter, Wieczorek - EE Low Noise Charge Sensitive Preamplifier Development for the PANDA Calorimeter Design and Measurements of the APFEL - Chip.
Self triggered readout of GEM in CBM J. Saini VECC, Kolkata.
L.ROYER – TWEPP Oxford – Sept The chip Signal processing for High Granularity Calorimeter (Si-W ILC) L.Royer, J.Bonnard, S.Manen, X.Soumpholphakdy.
8 July 1999A. Peisert, N. Zamiatin1 Silicon Detectors Status Anna Peisert, Cern Nikolai Zamiatin, JINR Plan Design R&D results Specifications Status of.
Development of the Readout ASIC for Muon Chambers E. Atkin, I. Bulbalkov, A. Voronin, V. Ivanov, P. Ivanov, E. Malankin, D. Normanov, V. Samsonov, V. Shumikhin,
Valerio Re, Massimo Manghisoni Università di Bergamo and INFN, Pavia, Italy Jim Hoff, Abderrezak Mekkaoui, Raymond Yarema Fermi National Accelerator Laboratory.
65 nm CMOS analog front-end for pixel detectors at the HL-LHC
1 Luciano Musa, Gerd Trampitsch A General Purpose Charge Readout Chip for TPC Applications Munich, 19 October 2006 Luciano Musa Gerd Trampitsch.
L.Royer– Calice LLR – Feb Laurent Royer, J. Bonnard, S. Manen, P. Gay LPC Clermont-Ferrand R&D pole MicRhAu dedicated to High.
ASIC Activities for the PANDA GSI Peter Wieczorek.
LHCb Vertex Detector and Beetle Chip
Investigation of crosstalk in the readout structure of the Beamcal K.Afanaciev.
February 12-13, 2006 FCAL Collaboration Meeting INP PAN, Kraków, Poland Readout electronics for LumiCal – first approach Wojciech Wierba Witold Daniluk.
Albuquerque 1 Wolfgang Lohmann DESY On behalf of the FCAL collaboration Forward Region Instrumentation.
S. Bota – Calorimeter Electronics overview - July 2002 Status of SPD electronics Very Front End Review of ASIC runs What’s new: RUN 4 and 5 Next Actions.
Front-End electronics for Future Linear Collider W-Si calorimeter physics prototype B. Bouquet, J. Fleury, C. de La Taille, G. Martin-Chassard LAL Orsay.
CERN PH MIC group P. Jarron 07 November 06 GIGATRACKER Meeting Gigatracker Front end based on ultra fast NINO circuit P. Jarron, G. Anelli, F. Anghinolfi,
CBM 12 th Meeting, October 14-18, 2008, Dubna Present status of the first version of NIHAM TRD-FEE analogic CHIP Vasile Catanescu and Mihai Petrovici NIHAM.
1 Front-end electronic for Si-W calorimeter Sylvie Bondil Julien Fleury Christophe de La Taille Gisèle Martin Ludovic Raux.
November, 7, 2006 ECFA06, Valencia, Spain LumiCal & BeamCal readout and DAQ for the Very Forward Region Wojciech Wierba Institute of Nuclear Physics Polish.
1 C. Ballif 3, W. Dabrowski 2, M. Despeisse 3, P. Jarron 1, J. Kaplon 1, K. Poltorak 1,2 N. Wyrsch 3 1 CERN, Geneva, Switzerland 2 Faculty of Physics and.
Front-end Electronic for the CALICE ECAL Physic Prototype Christophe de La Taille Julien Fleury Gisèle Martin-Chassard Front-end Electronic for the CALICE.
Flex Cable Readout unit Si Sensor 256 analog lines Interconnect board NCC signal packaging concept PA board -This is the calorimeter – all pads in the.
Analog Front End For outer Layers of SVT (L.4 & L.5) Team:Luca BombelliPost Doc. Bayan NasriPh.D. Student Paolo TrigilioMaster student Carlo FioriniProfessor.
Analog Circuits Hiroyuki Murakami. CONTENTS Structure of analog circuits Development of wide linear range CSA system Problem of analog circuits How to.
Barrel EM Calorimeter Preamp / Shaper Update Mitch Newcomer, Andrew Townley Prepared for Munich Liquid Argon Week 2011.
CEA DSM Irfu IDeF-X HD Imaging Detector Front-end for X-ray with High Dynamic range Alicja Michalowska, CEA-IRFU 1 Journées VLSI June 2010.
Status of hardware activity in CNS Taku Gunji Center for Nuclear Study University of Tokyo 1.
Performance of the PHENIX NCC Prototype Michael Merkin Skobeltyn Institute of Nuclear Physics Moscow State University.
The design of fast analog channels for the readout of strip detectors in the inner layers of the SuperB SVT 1 INFN Sezione di Pavia I Pavia, Italy.
KLOE II Inner Tracker FEE
HEC I chip design Short summary (J.Bán).
A General Purpose Charge Readout Chip for TPC Applications
on behalf of the AGH and UJ PANDA groups
CTA-LST meeting February 2015
A Readout Electronics System for GEM Detectors
Electronics for the E-CAL physics prototype
A Low Power Readout ASIC for Time Projection Chambers in 65nm CMOS
A Fast Binary Front - End using a Novel Current-Mode Technique
ECAL Electronics Status
BESIII EMC electronics
Signal processing for High Granularity Calorimeter
ASPID (Application of Silicon Photomultipliers to Imaging Detectors)
Readout Electronics for Pixel Sensors
Presented by T. Suomijärvi
Readout Electronics for Pixel Sensors
Presentation transcript:

Preliminary LumiCAL FEE Specification Presented by Alexander Solin NC PHEP FCAL collaboration meeting, February 12-13, 2006, Krakow (INP PAS), Poland

February 12-13, 2006, Krakow A.Solin2 Contents  Preliminary LumiCAL FEE Specification  ASICs for FCAL detectors prototypes (main parameters measurement setup, bench and beam tests)

February 12-13, 2006, Krakow A.Solin3 Preliminary LumiCAL FEE Specification

February 12-13, 2006, Krakow A.Solin4 Estimation of the pad Si-sensor capacitancies

February 12-13, 2006, Krakow A.Solin5 Estimation of the strip Si-sensor capacitancies

February 12-13, 2006, Krakow A.Solin6 Estimation of the maximum Si-sensor charge collection (1-1000)MIP channel signal range from B.Pawlik’s talk

February 12-13, 2006, Krakow A.Solin7 LumiCal Si-sensor parameters MaterialSi Think,  500  si 11.8 Depletion voltage, V155 Collection charge time, ns28 MIP,e40000 Capacitance range calculation (look previous pictures ) Minimum valueMaximum value Pad option42pF295pF Strip option isolated concentric sectors28pF395pF bonded concentric strips168pF571pF

February 12-13, 2006, Krakow A.Solin8 LumiCAL ASIC requirements Signal to Noise Ratio (SNR)5 Maximum ENC, e8000 Maximum signal, MIP1000 Dynamic range, bit12-13 Shaping time, ns70 Amplitude output, V2 Gain, mV/fC0.31 Channel structure of the first prototypePreamplifier - Shaper Number of channels per chip (rough estimation) Detector mounting surface area, cm (for 22.5 cm detector length) Chip mounting surface area, cm 2 4 Total number of chips989 Number of channels per chip Pad option12 Strip option14 (4 in case of bonded concentric strips) Number of channels per chip fixed by tile size22 (cheap package), 44

February 12-13, 2006, Krakow A.Solin9 ASIC technologies Minsk1.5µ design rules Bi-JFET 0.8µ design rules CMOS 0.6µ design rules Bi-CMOS Leading European and Asiatic FABsup to deep submicron design rules (if it is reasonable) Next four pictures can help to estimate noises of frond end electronics. Calculations are done for Bi-JFET technology (see picture). Same calculations can be done for other technologies. Preamplifier noises will be similar to the presented calculations.

February 12-13, 2006, Krakow A.Solin10 Capacitance of Si-sensor vs its area 572pF 28pF

February 12-13, 2006, Krakow A.Solin11 ENC vs preamplifier power consumption 8000e

February 12-13, 2006, Krakow A.Solin12 ENC vs shaping time 8000e

February 12-13, 2006, Krakow A.Solin13 ENC vs Si-sensor Capacitance 572pF

February 12-13, 2006, Krakow A.Solin14 ASICs for FCAL detectors prototypes (main parameters measurement setup, bench and beam tests)

February 12-13, 2006, Krakow A.Solin15 Tetrode-BT, Tetrode-JFET ASICs 1996 year, CMS ECAL Two designs CSP were made in Minsk NC PHEP with slightly different circuits for amplifying of signals from Hamamtsu R2149 vacuum phototetrode: “TETRODE-BT” with bipolar input transistor; “TETRODE-JFET” with p-JFET input transistor.

February 12-13, 2006, Krakow A.Solin16 Design requirements to Tetrode CSPs Hamamtsu R2149 parameters: CSP requirements: Ca15pF Anode dark current0.1 nA Typical gain (HV= -900V, B= 0 T)30 Quantum eff. at 500 nm10% ENC, e<1000 Dynamic range, bit13 Output signal width (base-to-base), ns100ns

February 12-13, 2006, Krakow A.Solin17 CSP based on Tetrode JFET ENC=320e+18e/pF, Tp=800ns

February 12-13, 2006, Krakow A.Solin18 AS01PDA, AS01T ASICs 2002 year, TESLA THCAL Next AS01PDA ASIC were designed and manufactured in Minsk NC PHEP for amplifying of signals from photodetectors. The AS01PDA ASIC is a development of the “Tetrode BT” design line. It additionally contains a shaper and shaper gain control stage.

February 12-13, 2006, Krakow A.Solin19 AS01PDA main parameters Number of channels1 Circuit structurePreamplifier + Shaper + 50 Ohm Driver Additional propertyShaper Gain Control Shaper peaking time90ns Max. Gain9mV/fC ENC, e e/pF Shaper output+/-1.5V Power consumption18mW PackageSOP16

February 12-13, 2006, Krakow A.Solin20 AS01PDA block diagram

February 12-13, 2006, Krakow A.Solin21 AS01PDA tests  October, 2002  Output signals were digitalized with theTDS3032 scope.

February 12-13, 2006, Krakow A.Solin22 AS01PDA noise curves  February, 2006  Noise is measured with the Infiniium 54830B scope.

February 12-13, 2006, Krakow A.Solin23 ASIC for large capacitance detectors AS01T is optimazed for using with large capacitance detectors.  It has the same structure as AS01PDA.  The package is the same too.  Both chips (AS01T and AS01PDA) are placed on the same wafer and are manufactured in one process.

February 12-13, 2006, Krakow A.Solin24 Conclusion The next steps of development of FEE for FCAL  Making of readout electronics for immediate beam tests (Tetrode, AS01 ASICs)  Qualification of LumiCAL ASIC specification and design of new prototype of 22 channel preamplifier-shaper ASIC for amplifying of Si-detector signals.  Creation of multichannel readout electronics for larger FCAL prototypes.