The World Leader in High-Performance Signal Processing Solutions 1.ADCs - Ping-Pong Architectures 2.ADCs – Driving Them 3.DACs – Sinc Compensation 4.DACs – Glitches 5.What They Didnt Teach You in School Optimizing Data Converters for High Frequency Operation

1.1 Ping Pong ADCs References Analog Dialogue 37-8 (August 2003) Analog Dialogue 39-5 (May 2005) Do a Patent Search on Inventor: Velazquez; Classification: 341/118

1.2 Nyquist Theorem Limits Frequency Bandwidth

1.3 Ping-Pong ADCS Architecture

1.4 Ping-Pong ADCS Raw Spectral Response

1.5 Ping-Pong ADCS Matching Requirements Performance Requirement at 180 MHz SFDR (dBc) Gain Matching (%) Aperture Matching (fsec) 12 Bits Bits Bits Bits Bits Bits

1.6 Advanced Filter Bank (AFB) Reduces Spurs Due to ADC Mismatch

1.7 Ping Pong ADCs Trimmed SFDR

1.8 Ping Pong ADCs Temperature Effects

1.9 Linear Error Compensation (LinComp) Corrects for Non-Linearities

1.10 Driving ADCs References Analog Dialogue 39-4 (April 2005) Analog-Digital Conversion Seminar (2004)

1.11 Transformer Coupling Gives Best High Frequency Performance

1.12 ADC Drive

1.13 Dual Transformers Improve Balance at High Frequencies

1.14 Baluns Have a Wider Frequency Response

1.15 Applying Voltage Gain Can Improve Noise Performance

1.16 DACs Some Things You May Not Have Thought Of Sinc Compensation Effects Glitch Energy

1.17 DACs Suffer From Sinc Response Frequency (xFs) dB

1.18 Use Sinc Compensation to Reduce Passband Droop Frequency (xFs) dB

1.19 Passband is Flat But There is 3.5 dB Insertion Loss Frequency (xFs) dB

1.20 Sinc Compensation Doesnt Work So Well at Super Nyquist Bands Frequency (xFs) dB

1.21 AD9779 Vs AD9777 Time Domain Plot AD9777AD9779 Both DACs synthesizing a 1MHz sine wave in 1x interpolation mode with a 160MSPS clock rate. Due to the unique output stage of the AD9779, its time domain waveform has much more glitch energy than the AD9777

1.22 Glitches Are Worse but Noise Floor is Better

1.23 Glitches Are Worse but 3rd Order IMD Is better

1.24 Things They Dont Teach You In School Watch ALL your inputs Proper Decoupling Differential Signaling Clean Your Clock

1.25 How many Inputs Does a Data Converter Really Have? "QUIET DIGITAL BUFFER LATCH NOISY DATA BUS = DIGITAL GROUND PLANE D A AGNDDGND IAIA IDID B A = ANALOG GROUND PLANE Analog I/O C STRA Y A A D A A V D D A ANALOG CIRCUITS A Reference VAVA VDVD DIGITAL CIRCUITS C STRA Y Clock

1.26 Power Supply Decoupling Must Be Effective at Very High Frequencies

1.27 Why Differential Signaling?

1.28 How Clean Does Your Clock Need To Be FULL-SCALE ANALOG INPUT FREQUENCY (MHz) tjtj (ps) tjtj (ps) ENOB = SNR –1.76dB PLL WITH VCO PLL WITH VCXO DEDICATED LOW NOISE XTAL OSC

1.29 In Conclusion Hopefully you learned something Getting good high-frequency performance is tough But there are some things you can do to get the best performance you can Thank you for your kind attention Please talk to you friendly local ADI Sales Engineer when youre ready to start your next design