Status of CCC CALICE Collaboration Meeting DESY Hamburg, 21. March 2013 André Welker Lennart Adam, Bruno Bauss, Volker Büscher, Reinhold Degele, Karl Heinz Geib, Sascha Krause, Yong Liu, Lucia Masetti, Phi Chau, Uli Schäfer, Rouven Spreckels, Stefan Tapprogge, Rainer Wanke

Read-out-chain André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 SiPMASIC detector interface digital analog HBU data- aggregator (LDA) clock- and control-card (CCC) SiPMASIC detector interface digital analog HBU control clock trigger data busy DAQ PC beam control Ethernet on-detector-electronicoff-detector-electronic Ethernet control, trigger, clock, busy 2 Mainz-development: - firmware in VHDL -hardware -software fan-out more LDAs

Read-out-chain André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 SiPMASIC detector interface digital analog HBU data- aggregator (LDA) clock- and control-card (CCC) SiPMASIC detector interface digital analog HBU control clock trigger data busy DAQ PC beam control Ethernet on-detector-electronicoff-detector-electronic Ethernet control, trigger, clock, busy 2 fan-out more LDAs

Clock and Control Card(CCC) Requirements: 1.High clock stability in the whole detector 2.Configuration interface over Ethernet manage different running modes for feedback functions for beam control 3André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 Status: 1.Built and tested for a lab setup and used in test beams Next step: Upgrade for bigger test beams (almost finished)

2012 Clock and Control Card Mezzanine on an Kintex 7 Evaluation-Board: FPGA-controlled CCC board: 4 CCC at the testbeam (top): CCC at the testbeam (front): André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013

5 First iteration with a Zynq-processor on a Zedboard for development: New 2013 Clock and Control Card Zedboard: -Evaluation Board from Digilent Zynq: -ARM9 dual core processor (Linux) + - FPGA CCC Mezzanine from Mainz

6André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 Final design for test beams: Clock and Control Card(CCC) 6U-VME formfactor Peculiarity of the Mars-Modul: 1.Zynq - ARM9 dual core -Linux + FPGA MB NAND/RAM front:top: SYNC ASYNC USER TTL IN TTL OUT Micro-SD Ethernet Mars-ZX3 firm:Enclustra

CCC Fan-out same as in U-VME Fan-out board: Fan-out board layout: 7 Fan-out board at the testbeam: André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013

Four main modes and 13 commands: signal: e.g. busy: Running Modes 8 U 6242 t André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 start acquisition with falling edge stop acquisition with rising edge conditions: ASIC buffer full

Read-out-chain André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 SiPMASIC detector interface digital analog HBU data- aggregator (LDA) clock- and control-card (CCC) SiPMASIC detector interface digital analog HBU busy control DAQ PC beam control Ethernet on-detector-electronicoff-detector-electronic Ethernet busy control 9 fan-out control - stop acquisition - and start the detector read-out buffer full

Running Modes Four main modes and 13 commands: signal: e.g. busy: 10 U 6242 conditions: ASIC buffer full t André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 extended commands: (backward compatible) -manual trigger -listen on falling or rising edge -status -hard- and softreset -and many more start acquisition with falling edge stop acquisition with rising edge

CCC (and LDA) Configuration Processing Instruction Configurator (piconf) (by Rouven Spreckels) 11André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 ● Configures all devices ● Configuration procedures are automated ● Everything stored in one or multiple XML files ● Self-explanatory, predefined XML tags ● Interface independent:  implemented: TCP/IP

piconf example 12André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013

Status of CCC 1. One module physically exists 2.Hardware tested 3.Firmware almost done CCC should be ready to go for the test beam in May André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013

Thank you for your attention!