Cycle Based Simulation Mehrdad Abutalebi

Outline Motivation Cycle Simulation Cycle Simulation Techniques Cycle Simulation Specifications Areas of Applicability

Motivation Advanced today ’ s technologies Large circuit densities Large verification time Time to market Need for faster simulators New innovation and techniques Cycle based simulation

Cycle Simulation Cycle simulation is a technique for simulating circuits that do not take into account the detailed circuit timing Cycle simulation computes the steady state response of the circuit at each clock cycle boundary Need for another tool for timing analysis

Cycle Simulation

Cycle Simulation Techniques Event ordering and delayed evaluation All scheduled evaluations will take place at active edge of clock All events are put in an event orderer which eliminate unnecessary evaluations

Cycle Simulation Techniques Cycle based oblivious simulation Logic levelization is applied to the design Clocked elements are clocked at active edge Combinational logic is evaluated during the cycle

Cycle Simulation Specifications Ignore timing and reducing the state set(2 value and sometime 4 value) Efficient evaluation and faster simulation Circuit levelization at compile time Each element is evaluated once during clock cycle Simple data structure for simulator 10 to 100 times performance over event driven simulation

Areas of Applicability Large synthesizable or logic optimizable designs Designs that are mostly synchronous Designs meet the cycle simulation subset RTL regression Gate-level verification