Chapter 2 Boolean Algebra and Logic Gates 授課教師 : 張傳育 博士 (Chuan-Yu Chang Ph.D.) Tel: (05) ext Office: EB212

Digital Circuits 2- 2 Basic Definitions A set of elements is any collection of objects, usually having a common property. If S is a set, and x and y are certain objects, x ∈ S means that x is a member of the set S. y ∉ S means that y is not an element of the set S. A binary operator defined on a set S of elements is a rule that assigns, to each pair of elements from S, a unique element from S. a*b=c * is a binary operator if it specifies a rule for finding c from the pair ( a,b ) and also if a, b, c ∈ S. * is not a binary operator if a, b ∈ S, c ∉ S.

Digital Circuits 2- 3 Basic Definitions (cont.) Closure A set S is closed with respect to a binary operator if, for every pair of elements of S, the binary operators specifies a rule for obtaining a unique element of S. The set of natural number N={1,2,3,4,…} is closed with respect to the binary operator + by the rules of arithmetic addition, since, for any a, b ∈ N, there is a unique c ∈ N such that a+b=c. The set of natural number N is not closed with respect to the binary operator - by the rules of arithmetic subtraction, since, 2-3=-1, 2,3 ∈ N, but (-1) ∉ N.

Digital Circuits 2- 4 Basic Definitions (cont.) Associative law A binary operator * on a set S is said to be associative whenever Commutative law A binary operator * on a set S is said to be commutative whenever Identity element A set S is said to have an identity element with respect to a binary operation * on S if there exists an element e ∈ S with the property that

Digital Circuits 2- 5 Basic Definitions (cont.) Inverse A set S having the identity element e with respect to a binary operator * is said to have an inverse whenever, for every x ∈ S, there exists an element y ∈ S such that In the set of integers, I, and the operator +, with e=0, the inverse of an element a is (-a), since a+(-a)=0. Distributive law IF * and ∙ are two binary operators on a set S, * is said to be distributive over ∙ whenever

Digital Circuits 2- 6 Axiomatic Definition of Boolean Algebra Boolean algebra In 1854, George Boole developed an algebraic system. Switching algebra In 1938, C. E. Shannon introduced a two-valued Boolean algebra called switching algebra that represented the properties of bistable electrical switching circuits. Huntington postulates In 1904, E. V. Huntington introduced the postulates of Boolean algebra. Boolean algebra is an algebraic structure defined by a set of elements, B, together with two binary operators, + and ∙.

Digital Circuits 2- 7 Axiomatic Definition of Boolean Algebra (cont.) Following Hunting postulates are satisfied: 1. Closure with respect to the operator + ( ‧ ) x, y  B  x+y  B 2. An identity element w.r.t. + ( ‧ ) 0+x = x+0 = x 1 ‧ x = x ‧ 1= x 3. Commutative w.r.t. + ( ‧ ) x+y = y+x x ‧ y = y ‧ x

Digital Circuits 2- 8 Axiomatic Definition of Boolean Algebra (cont.) 4. ‧ is distributive over + : x ‧ (y+z)=(x ‧ y)+(x ‧ z) + is distributive over ‧ : x+(y ‧ z)=(x+y) ‧ (x+z)   x  B,  x'  B (complement of x )  x+x'=1 and x ‧ x'=0   at least two elements x, y  B  x ≠ y Comparing Boolean algebra with arithmetic algebra, we note the following differences: Huntington postulates do not include the associative law, however, it can be derived from other postulates. The distributive law of + over ‧ ( x+(y ‧ z)=(x+y) ‧ (x+z) ), is valid for Boolean algebra, but not for arithmetic algebra. Boolean algebra does not have additive and multiplicative inverses Complement is not available in ordinary algebra. Boolean algebra deal with two-valued Boolean number. Ordinary algebra deals with the real number.

Digital Circuits 2- 9 Two-valued Boolean Algebra A two valued Boolean algebra is defined on a set of two elements, B = {0,1}, with rules for the operations + and ‧ The Huntington postulates are valid for the set B and the two binary operator + and ‧ Closure The identity elements (1) +: 0 (2) ‧ : 1

Digital Circuits Two-valued Boolean Algebra (cont.) The commutative laws are obvious from the symmetry of the binary operator tables. The distributive laws x(y+z) = xy + xz can be shown to hold from the operator tables.

Digital Circuits Two-valued Boolean Algebra (cont.) Complement x+x'= 1: 0+0'=0+1=1; 1+1'=1+0=1 x ‧ x'= 0: 0 ‧ 0'=0 ‧ 1=0; 1 ‧ 1'=1 ‧ 0=0 Postulate 6 is satisfied because the two-valued Boolean Algebra has two distinct elements 1 and 0, with 0 ≠ 1 Note a set of two elements + : OR operation; ‧ : AND operation a complement operator: NOT operation Binary logic is a two-valued Boolean algebra

Digital Circuits Basic Theorems and Properties Duality the binary operators are interchanged; AND  OR the identity elements are interchanged; 1  0

Digital Circuits Basic Theorems and Properties Theorem 1(a): x+x = x – x+x = (x+x) 1 by postulate:2(b) = (x+x) (x+x') 5(a) = x+xx' 4(b) = x+0 5(b) = x 2(a) –Theorem 1(b): x x = x – xx = x x + 0 = xx + xx' = x (x + x') = x 1 = x

Digital Circuits Basic Theorems and Properties Theorem 2 x + 1 = 1 (x + 1) = (x + x')(x + 1) = x + x' 1 = x + x' = 1 x 0 = 0 by duality Theorem 3: (x')' = x Postulate 5 defines the complement of x, x + x' = 1 and x x' = 0 The complement of x' is x is also (x')'

Digital Circuits Basic Theorems and Properties Theorem 6 x + xy = x 1 + xy = x (1 +y) = x 1 = x x (x + y) = x by duality By means of truth table

Digital Circuits Basic Theorems and Properties DeMorgan's Theorems (x+y)' = x' y' (x y)' = x' + y'

Digital Circuits Basic Theorems and Properties Operator Precedence – parentheses – NOT – AND – OR – examples – x y ' + z – (x y + z) '

Digital Circuits Boolean Functions A Boolean function is an algebra that deals with binary variables and logic operations. binary variables binary operators OR and AND unary operator NOT parentheses Examples F 1 = x y z' F 2 = x + y'z F 3 = x' y' z + x' y z + x y' F 4 = x y' + x' z

Digital Circuits Boolean Functions (cont.) The truth table of 2 n entries Two Boolean expressions may specify the same function F 3 = F 4 F 1 = x y z' F 2 = x + y'z F 3 = x' y' z + x' y z + x y' F 4 = x y' + x' z

Digital Circuits Implementation with logic gates F 4 is more economical F3F3 F4F4 F2F2 Boolean Functions (cont.) F 1 = x y z' F 2 = x + y'z F 3 = x' y' z + x' y z + x y' F 4 = x y' + x' z

Digital Circuits Algebraic Manipulation To minimize Boolean expressions literal: a primed or unprimed variable (an input to a gate) term: an implementation with a gate The minimization of the number of literals and the number of terms => a circuit with less equipment It is a hard problem (no specific rules to follow) Examples: x(x'+y) = xx' + xy = 0+ xy = xy x+x'y = (x+x')(x+y) = 1 (x+y) = x+y (x+y)(x+y') = x+xy+xy'+yy' = x(1+y+y') = x

Digital Circuits Algebraic Manipulation (cont.) x'y'z + x'yz + xy' = x'z(y'+y) + xy' = x'z + xy' xy + x'z + yz = xy + x'z + yz(x+x') = xy + x'z + yzx + yzx' = xy(1+z) + x'z(1+y) = xy +x'z (x+y)(x'+z)(y+z) = (x+y)(x'+z) by duality from the previous result

Digital Circuits Complement of a Function The complement of a function F is F’ and is obtained from an interchange of 0's for 1's and 1's for 0's in the value of F by DeMorgan's theorem (A+B+C)' = (A+X)' let B+C = X = A'X' by DeMorgan's = A'(B+C)' = A'(B'C') by DeMorgan's = A'B'C ' associative Generalization form of DeMorgan's theorem (A+B+C+... +F)' = A'B'C'... F' (ABC... F)' = A'+ B'+C'+... +F‘ The complement of a function is obtained by interchanging AND and OR operators and complementing each literal.

Digital Circuits Complement of a Function (cont.) Example 2.2: Find the complement of the functions F 1 =x’yz’+x’y’z and F 2 =x(y’z’+yz) F 1 ’=(x'yz' + x'y'z)' = (x'yz')' (x‘y'z)' = (x+y'+z) (x+y+z') F 2 ’=[x(y'z'+yz)]' = x' + ( y'z'+yz)' = x' + (y'z')' (yz)' = x' + (y+z) (y'+z') A simpler procedure take the dual of the function and complement each literal. Example 2.3: F 1 =x'yz' + x'y'z => (x'+y+z') (x'+y'+z) (the dual) => (x+y'+z)(x+y+z')=F 1 ’ (complement each literal)

Digital Circuits Canonical and Standard Forms Minterms and Maxterms A minterm : an AND term consists of all literals in their normal form or in their complement form For example, two binary variables x and y, xy, xy', x'y, x'y' It is also called a standard product n variables con be combined to form 2 n minterms A maxterm : an OR term It is also call a standard sum For example, (x+y) 2 n maxterms each maxterm is the complement of its corresponding minterm, and vice versa

Digital Circuits Canonical and Standard Forms (cont.) m j, the subscript j denotes the decimal equivalent of the binary number of the minterm designated. Each maxterm is obtained from an OR term of the n variables with each variable being unprimed. Each maxterm is the complement of its corresponding minterm and vice versa.

Digital Circuits Canonical and Standard Forms (cont.) An Boolean function can be expressed by a truth table sum of minterms f 1 = x'y'z + xy'z' + xyz = m 1 + m 4 +m 7 f 2 = x'yz+ xy'z + xyz'+xyz = m 3 + m 5 +m 6 + m 7

Digital Circuits Canonical and Standard Forms (cont.) The complement of a Boolean function the minterms that produce a 0 f 1 ' = m 0 + m 2 +m 3 + m 5 + m 6 = x'y'z'+x'yz'+x'yz+xy'z+xyz' f 1 = (f 1 ')' = (x+y+z)(x+y'+z) (x+y'+z') (x'+y+z')(x'+y'+z) = M 0 M 2 M 3 M 5 M 6 Any Boolean function can be expressed as a sum of minterms a product of maxterms Boolean functions expressed as a sum of minterms or product of maxterms are said to be in canonical form. 每一項必須包含全部的變數

Digital Circuits Sum of minterms Example 2.4 F = A+B'C = A (B+B') + B'C = AB +AB' + B'C = AB(C+C') + AB'(C+C') + (A+A')B'C =ABC+ABC'+AB'C+AB'C'+A'B'C F = A'B'C +AB'C' +AB'C+ABC'+ ABC = m 1 + m 4 +m 5 + m 6 + m 7 F(A,B,C) =  (1, 4, 5, 6, 7) or, built the truth table first

Digital Circuits Product of maxterms x + yz = (x + y)(x + z) = (x+y+zz')(x+z+yy') =(x+y+z)(x+y+z’)(x+y'+z) F = xy + x'z = (xy + x') (xy +z) = (x+x')(y+x')(x+z)(y+z) = (x'+y)(x+z)(y+z) x'+y = x' + y + zz' = (x'+y+z)(x'+y+z') F = (x+y+z)(x+y'+z)(x'+y+z)(x'+y+z') = M 0 M 2 M 4 M 5 F(x,y,z) =  (0,2,4,5)

Digital Circuits Conversion between Canonical Forms F(A,B,C) =  (1,4,5,6,7) F'(A,B,C) =  (0,2,3) By DeMorgan's theorem F(A,B,C) =  (0,2,3) m j ' = M j sum of minterms = product of maxterms interchange the symbols  and  and list those numbers missing from the original form  of 1's  of 0's

Digital Circuits Conversion between Canonical Forms Example F = xy + xz F(x, y, z) =  (1, 3, 6, 7) F(x, y, z) =  (0, 2, 4, 5)

Digital Circuits Standard Forms Canonical forms are seldom used( 因為每一項必須 包含全部的變數 ) sum of products, SOP F 1 = y' + zy+ x'yz' product of sums, POS F 2 = x(y'+z)(x'+y+z'+w) F 3 = A'B'CD+ABC'D'

Digital Circuits Standard Forms (cont.) Two-level implementation Multi-level implementation

Digital Circuits Other Logic Operations 2 n rows in the truth table of n binary variables 2 2n functions for n binary variables 16 functions of two binary variables All the new symbols except for the exclusive-OR symbol are not in common use by digital designers

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Digital Circuits Digital Logic Gates Boolean expression: AND, OR and NOT operations Constructing gates of other logic operations the feasibility and economy the possibility of extending gate's inputs the basic properties of the binary operations the ability of the gate to implement Boolean functions

Digital Circuits Consider the 16 functions two are equal to a constant four are repeated twice inhibition and implication are not commutative or associative the other eight: complement, transfer, AND, OR, NAND, NOR, XOR, and equivalence are used as standard gates complement: inverter transfer: buffer (increasing drive strength) equivalence: XNOR

Digital Circuits Figure 2.5 Digital logic gates

Digital Circuits Figure 2.5 Digital logic gates (continued)

Digital Circuits Extension to multiple inputs A gate can be extended to multiple inputs if its binary operation is commutative and associative AND and OR are commutative and associative (x+y)+z = x+(y+z) = x+y+z (x y)z = x(y z) = x y z

Digital Circuits Extension to multiple inputs (cont.) NAND and NOR are commutative but not associative => they are not extendable

Digital Circuits Extension to multiple inputs (cont.) Multiple NOR = a complement of OR gate Multiple NAND = a complement of AND The cascaded NAND operations = sum of products The cascaded NOR operations = product of sums

Digital Circuits Extension to multiple inputs (cont.) The XOR and XNOR gates are commutative and associative Multiple-input XOR gates are uncommon? XOR is an odd function: it is equal to 1 if the inputs variables have an odd number of 1's

Digital Circuits Positive and Negative Logic two signal values two logic values positive logic: H=1; L=0 negative logic: H=0; L=1 Consider a TTL gate a positive logic NAND gate a negative logic OR gate the positive logic is used in this book

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Digital Circuits Integrated Circuits An IC is a silicon semiconductor crystal, called a chip, containing the electronic components for constructing digital gates. Levels of integration: SSI: < 10 gates MSI: 10 ~ 100 gates LSI: 100 ~ xk gates VLSI: > xk gates small size (compact size) low cost low power consumption high reliability high speed

Digital Circuits Integrated Circuits (cont.) Digital logic families: circuit technology TTL: transistor-transistor logic (dying?) ECL: emitter-coupled logic (high speed, high power consumption) MOS: metal-oxide semiconductor (NMOS, high density) CMOS: complementary MOS (low power) BiCMOS( 雙載子互補式金氧半導體 ): high speed, high density

Digital Circuits Integrated Circuits (cont.) The characteristics of digital logic families Fan-out: the number of standard loads that the output of a typical gate can drive. Fan-in: the number of inputs available in a gate. Power dissipation: the power consumed by the gate. Propagation delay: the average transition delay time for the signal to propagate from input to output. Noise margin: the minimum of external noise voltage that caused an undesirable change in the circuit output.

Digital Circuits Integrated Circuits (cont.) CAD – Computer-Aided Design Millions of transistors Computer-based representation and aid Automatic the design process Design entry Schematic capture HDL – Hardware Description Language Verilog, VHDL Simulation Physical realization ASIC, FPGA, PLD