Cosc 3P92 Week 9 & 10 Lecture slides Violence is the last refuge of the incompetent. Isaac Asimov, Salvor Hardin in "Foundation"

Virtual Memory The main idea is to allow programs to address more memory locations than are physically available. first: overlays programmer manually divide programs into sections, and read, write them out during execution. virtual memory: automatic transparent overly mgmt virtual (logical) address: generated by program physical address: actual memory address during execution Addresses generated by programs are called virtual addresses, and which are mapped into physical addresses during execution time.

Virtual Memory Three techniques: paging system segmentation system program virtual address VM algorithm physical Main memory secondary storage Three techniques: paging system segmentation system paged segmentation system

Virtual Memory: Paging Paging system: The virtual address space is divided into equal-sized pages and the physical memory is divided into frames of the same size. Physical memory Frame 1 2 3 4 5 6 7 (4K per frame) (32K total) Page Table Virtual Memory page 0 page 1 page 2 page 3 page 4 page 5 page 6 page 7 page 8 page 9 page 10 page 11 page 12 page 13 page 14 page 15 page # offset Virtual address (4K per page) (64K total) 3-bit 4-bit 12-bit 1-bit IF PageTable[page #]. residence-bit =1 THEN RETURN Frame[ PageTable[page #].frame ]+offset ELSE page fault

Example

Paging • page mapping mechanism is often done via special hardware • page fault: page not resident - read from secondary storage into main memory - update page table with physical memory address - repeat instruction that caused fault • demand paging: get page only when asked for vs. algorithms which evaluate page usage and do predictive page fetches • working set: the finite set of pages which a program will use during execution (ie. progrms don't use infinite memory) • when working set size > # page frames, thrashing likely total pages used time --->

Paging Page replacement: random (not recommended) least recently used first-in-first-out (least recently paged in) can use dirty bits: write back pages only when modified fragmentation: page sizes fixed, so can have unused page portions (and therefore unused memory) program memory space virtual mapping

Paging Large page sizes: Small page sizes: maximal use of slow secondary storage less frequent page reads smaller tables more apt to have fragmentation Small page sizes: less fragmentation good for programs that use small spread out memory references need more IO calls, larger tables

Virtual Memory: Segmentation Segmentation system: A program is divided into a collection of logical segments (e.g., procedures, arrays, stacks) which may be of different sizes. Each segment has a separate virtual address space. segment B segment A Physial Memory 1 10K 7K 4K 5K Segment Table seg # offset Virtual address 2-bit N-bit unused Virtual Memory segment A 1 segment B 2 segment C IF SegmentTable[seg #].valid-bit = 1 THEN IF offset < SegmentTable[seg #].length THEN RETURN SegmentTable[seg #].base + offset ELSE memory violation segment fault 3 segment D

Segmentation Segments: can be allocated for different program parts, data structures, users Different modes, access privileges can be assigned (permits memory violation checking, shared memory,...) Sizes are alterable during execution. The basis for multitasking multi-user systems

Segmentation Garbage collection: best fit, first-fit, hole compaction, ...

Paged segmentation system Merges ideas of previous 2 approaches Segments are divided into groups of pages Virtual address is a triple <s,p,d> e.g MULTICS

Paged segmentation Address mapping: Speeding up virtual memory access 1. segment numbers leads to index in segment table gives base address of page table 2. page no. p indexed into page table, and frame p' is found 3. physical address computed by adding displacement d to p' Speeding up virtual memory access address translation look aside buffer like a page table cache associative memory contains most recently used page info common in mainframes [fig next page]

Physical Address

Paged vs Segmentation

Example: Pentium II VM support A paged-segmentation system MMU: memory mgmt unit on CPU PII has segment registers: DS (data), CS (code), ... [6.12, 6.13, 6.14] Scheme: selector: 16-bits, 1 per segment, loaded into approp. segment register local: application; global: OS, system corresp. segment descriptor loaded for that segment offset is checked to see if it is beyong segment bounds (TRAP - software interrupt) seg size: G = 0 (seg size up to 1 Mb); G=1 (pages) base added to offset to get a linear address (base split for back-compatibility with 286) if paging off, this address is physical address if paging on: --> it’s a virtual address must be mapped: page directory (1K entries) --> page table (1K page entries) --> phys address [6.15]

Example: ultraSparc VM support Paged virtual memory supported only 44 bits of 64-bit addr space used for VM varying page sizes: [6.17] TLB: translation lookaside buffer [6.18] maps virtual page # to physical page frame # 64 most recently used virt. page #’s for each of instns, data also a context -- process ID if not in TLB, a trap called, and OS software must fix not same as a page miss! page may be in memory. OS must also maintain a TSB (trans. storage buffer) - like a cache of pages otherwise, if a TSB miss, then OS does whatever it wants to implement it --> no H/W support!

Comparing PII and UltraSparc 32-bit segments, fixed 1K segment/page table sizes max 1 million pages per segment can do pure segmentation, pure paging, or paged segmentation only 1 segment per process in Windows, Unix UltraSparc: huge address space 2 billion pages: conventional page tables unworkable

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