Rabie A. Ramadan Lecture 3 Digital Design Rabie A. Ramadan Lecture 3

Registers and Counters

Registers A circuit with flip-flops is considered a sequential circuit even in the absence of combinational logic. Register – is a group of flip-flops. Its basic function is to hold information within a digital system so as to make it available to the logic units during the computing process. However, A register may also have additional capabilities associated with it.

Counters Counter – is essentially a register that goes through a predetermined sequence of states. The gates in the counter are connected in such a way as to produce the prescribed sequence of binary states.

4-bit Register Clear will reset all of the FFs

Register with Parallel Load If all the bits in a register are loaded at the same time, the loading is done in parallel. The feedback connection from output to input is necessary because the D flip-flop does not have a “no change” condition.

Shift Registers Registers capable of shifting their binary contents in one or both directions. Q0(t+1) = SI Q1(t+1) = Q0(t) Q2(t+1) = Q1(t) Q3(t+1) = Q2(t) Each clock pulse shifts the contents of the register one bit position to the right.

Serial Transfer Serial transfer of information from register A to register B is done with shift registers: Assume that the binary content of A before the shift is 1011 and that of B is 0010. The serial transfer occurs in four steps as shown in the table below:

Serial Addition Bits in the two registers are added one pair at a time through a single full adder (FA) circuit. The carry out of the FA is transferred to a D flip-flop. The output of this flip-flop is then used as the carry input for the next pair of significant bits.

Counters

We’ll soon look at some extensions to this basic idea. Introducing counters Counters are a specific type of sequential circuit. The state, or the flip-flop values themselves, serves as the “output.” The output value increases by one on each clock cycle. After the largest value, the output “wraps around” back to 0. Using two bits, we’d get something like this: 00 01 10 11 1 We’ll soon look at some extensions to this basic idea.

What good are counters? Counters can act as simple clocks to keep track of “time.” You may need to record how many times something has happened. How many bits have been sent or received? How many steps have been performed in some computation? All processors contain a program counter, or PC. Programs consist of a list of instructions that are to be executed one after another (for the most part). The PC keeps track of the instruction currently being executed. The PC increments once on each clock cycle, and the next program instruction is then executed.

A slightly fancier counter Let’s try to design a slightly different two-bit counter: Again, the counter outputs will be 00, 01, 10 and 11. Now, there is a single input, X. When X=0, the counter value should increment on each clock cycle. But when X=1, the value should decrement on successive cycles. We’ll need two flip-flops again. Here are the four possible states: 00 01 10 11

The complete state diagram and table Here’s the complete state diagram and state table for this circuit. Make sure you know how to come up with these – this is a typical sequential design problem! 00 01 10 11 1

D flip-flop inputs If we use D flip-flops, then the D inputs will just be the same as the desired next states. D1 =?? D0 =??

D flip-flop inputs If we use D flip-flops, then the D inputs will just be the same as the desired next states. Equations for the D flip-flop inputs are shown at the right. D1 = Q1  Q0  X D0 = Q0’

Circuit Here are some D Flip Flop devices They have both normal and complemented outputs, so we can access Q0’ directly without using an inverter. (Q1’ is not needed in this example.) This circuit counts normally when Reset = 1. But when Reset is 0, the flip-flop outputs are cleared to 00 immediately.

Standard Counters Ripple Counters Synchronous Counters The FF output serves as a trigger to other FFs Synchronous Counters The trigger (Clock ) is common to all FFs 1 clock Q1 Q2

Binary Ripple Counter Negative edge FFs Least significant FF (e.g. A0) output is an input to the next one . Logic -1 is an input The least significant FF toggles the output with each clock

Binary Ripple Counter Part of the output Simply, A1 will toggle its state when A0 output changes from 1 to 0 A2 toggles its state when A1 output changes from 1 to 0 A3 toggles its state when A2 output changes from 1 to 0 A0 A1 A2 A3 1 .

Another Ripple Counter

BCD Ripple Counter Counts to 9 and back to 0 again How many FFs required ? 4

BCD Ripple Counter Q1 triggers Q2 and Q8 Q2 triggers Q4 Q2 and Q4 inputs to J in Q8

Synchronous counters Clock is common to all FFs Change in all FFs done at the same time Change decision is based on the input circuits

Binary Counters

Up-Down Binary Counter Up/Down Counter can either count up or down on each clock cycle Up counter counts from 0000 to 1111 and then changes back to 0000 Down counter counts from 1111 to 0000 and then back to 1111 Counter counts up or down each clock cycle Output changes occur on clock rising edge

Counters with Parallel Load Counters with parallel load can have a preset value Load signal indicates that data (I3…I0) should be loaded into the counter Clear resets counter to all zeros Carry output could be used for higher-order bits

Summary Binary counters can be ripple or synchronous Ripple counters use flip flop outputs as flop triggers Some delay before all flops settle on a final value Do no require a clock signal Synchronous counters are controlled by a clock All flip flops change at the same time Up/Down counters can either increment or decrement a stored binary value Control signal determines if counter counts up or down Counters with parallel load can be set to a known value before counting begins