Andrey Mokhov, Victor Khomenko Arseniy Alekseyev, Alex Yakovlev Algebra of Parameterised Graphs

Motivation Design cost is the greatest threat to the semiconductors roadmap: manufacturing takes weeks, with low uncertainty design takes months or years, with high uncertainty Designer has to explore a large design space, and thus comprehend a huge number of system configurations operational modes behavioural scenarios implementation choices Infeasible to consider each individual mode, need to exploit similarities between the individual modes work with groups of modes rather than individual ones manage the modes and groups of modes compositionally transform/optimise specs in a formal and natural way

Design productivity gap 10000py Annual productivity gain ~20% Annual manufacturing gain >40% 850py “Productivity gap”

? 13 lines 270 stations Individual descriptions

Easier for comprehension and reasoning Gives bigger picture of the system Easier to modify than individual lines Orange Park Overlaid descriptions ?

Characteristics of components a)2-input adder b)3-input adder c)2-input multiplier d)fast 2-input multiplier e)dedicated DP3 unit Design space exploration DP3(x,y)=x 1 y 1 + x 2 y 2 + x 3 y 3

Fastest Design space exploration 2 multipliers Least peak power Dedicated component Balanced

Operations on graphs: overlay G 1 +G 2 + = = +

Operations on graphs: sequence G 1  G 2 = =  

Operations on graphs: condition [x]G [0]G=  (empty graph) [1]G=G From arithmetic to algebra: use parameters [x]G

Operations on graphs: condition [x]G [0]G=  (empty graph) [1]G=G From arithmetic to algebra: use parameters [x]G

Operations on graphs: condition [x]G [0]G=  (empty graph) [1]G=G From arithmetic to algebra: use parameters [x]G [1] [0] ? [x]

Canonical form of PGs Proposition: Any PG can be rewritten in the following canonical form: where V is a subset of singleton graphs that appear in the original PG b v are canonical forms of Boolean expressions b uv are canonical forms of Boolean expressions, s.t. b uv ⇒ b u  b v

Algebra of PGs We define the equivalence relation on PGs abstractly, using the following axioms: + is commutative and associative  is associative  is a left and right identity of   left- and right-distributes over + Decomposition: p  q  r = p  q + p  r + q  r Condition: [0]p =  and [1]p = p Theorem: The set of axioms of PG-algebra is sound minimal complete w.r.t. PGs

Useful equalities (proved from axioms)  is an identity of + + is idempotent Left/right absorption: p + p  q = p  q q + p  q = p  q Conditional  : [x]  =  Conditional + and  : [x](p + q) = [x]p + [x]q [x](p  q) = [x]p  [x]q AND-condition: [x  y]p = [x][y]p OR-condition: [x  y]p = [x]p + [y]p

Case study: phase encoder Phase encoding: data is encoded by the order of arrival of signals on n wires: Goal: synthesise matrix phase encoder Inputs: dual-rail ports x ij that specify the order of signals Outputs: phase encoded data v i abdc n! scenarios

Case study: phase encoder Overall specification: where H ij models behaviour of i th and j th output wires If x ij =1 and x ji =0 then there is a causal dependency v i  v j If x ij =0 and x ji =1 then there is a causal dependency v j  v i If x ij =x ji =0 then neither v i nor v j can be produced yet; this is expressed by a circular wait condition between v i and v j |H| and the resulting circuit are linear in the size of input!

Transitive Parameterised Graphs  is often interpreted as causal dependency, so the graphs are transitive Hence two graphs are considered equal iff their transitive closures are equal Can express this by an additional axiom Closure: if q   then p  q + q  r = p  q + p  r + q  r Often allows to simplify expressions by transitive reduction

Transitive parameterised graphs PG expression [x]((a + b)  c + c  d) + [x]((a + b)  (d + e)) with the specialisations TPG expression (a + b)  ([x]c  d + [x]e) with the specialisations

Canonical form of TPGs Proposition: Any TPG can be rewritten in the following canonical form: where V is a subset of singleton graphs that appear in the original TPG b v are canonical forms of Boolean expressions b uv are canonical forms of Boolean expressions, s.t. b uv ⇒ b u  b v transitivity: for all u,v,w ∈ V, b uv  b vw ⇒ b uw

TPG axioms – minimal, sound, complete Theorem: The set of axioms of TPG-algebra is sound minimal complete w.r.t. TPGs.

Case study: Processor microcontroller ?

Instructions classes: ALU Rn to Rne.g. ADD A,B; MOV A,B ALU #123 to Rne.g. SUB A,#1; MOV B,#3 ALU Rn to PCe.g. JMP A ALU #123 to PCe.g. JMP #2012 Memory accesse.g. MOV A,[B]; MOV [B],A Cond. ALU Rn to Rne.g. if A<B then ADD A,B Cond. ALU #123 to Rne.g. if A<B then SUB A,#1 Cond. ALU #123 to PCe.g. if A<B then JMP #2012

Case study: Processor microcontroller ALU #123 to Rne.g. SUB A,#1; MOV B,#3 TPG algebra specification: PCIU  IFU  (ALU + PCIU’)  IFU’ The graph is considered up to transitivity

Case study: Processor microcontroller Cond. ALU #123 to Rne.g. if A<B then SUB A,#1 If A < B holds: (ALU + PCIU)  IFU  (ALU’ + PCIU’)  IFU’ If A < B does not hold: (ALU + PCIU)  PCIU’  IFU’ Composing the two scenarios, lt := (A<B): [lt]((ALU + PCIU)  IFU  (ALU’ + PCIU’)  IFU’)+ [lt]((ALU + PCIU)  PCIU’  IFU’) = (ALU + PCIU)  [lt]IFU  (PCIU’ + [lt]ALU’)  IFU’

Case study: Processor microcontroller Cond. ALU #123 to Rne.g. if A<B then SUB A,#1 (ALU + PCIU)  [lt]IFU  (PCIU’ + [lt]ALU’)  IFU’

Case study: Processor microcontroller

Conclusions and future work New formalisms: PG and TPG algebrae with sound, minimal and complete sets of axioms Canonical forms Can work with groups of scenarios and exploit the similarities between them Can formally compose, manipulate and simplify the specifications using the rules of these algebrae Applications in microelectronics, formal methods, computer architecture, modelling university courses Future work: Tool implementation Simplification by modular decomposition of graphs

Thank you!