EE 348: Lecture Supplement Notes SN2 Semiconductor Diodes: Concepts, Models, & Circuits 22 January 2001

EE 348 – Spring 2001J. Choma, Jr.Slide 44 Outline Of Lecture Rectification Semiconductor Diode  Circuit Schematic Symbol  Simplified Volt-Ampere Characteristic  Model  Static Volt-Ampere Relationship  Time Domain Charge Control Model Diode Circuits  Half Wave Rectifier  Full Wave Rectifier  Simple Limiter

EE 348 – Spring 2001J. Choma, Jr.Slide 45 Power Supply System System  Voltage At “1” Has Given RMS Value And Zero Average Value  Voltage At “2” Has Non-Zero Average Value; It Is A Time-Varying, Harmonically Rich Half Or Full Wave Rectified Sinusoid  Lowpass Filter Attenuates Harmonics At “2” To Produce Constant, Time-Invariant Voltage At “3”  Regulator Produces A Very Small Output Resistance Seen Looking Back From “4” Load  Effective Load Resistance Is V DC /I DC  Voltage Source Nature At “4” Produces Near Constant V DC, Regardless Of Current Value, I DC

EE 348 – Spring 2001J. Choma, Jr.Slide 46 AC To DC Conversion Sinusoid Input: Output: Open Switch SW Whenever V s < 0 Plot Assumes V s = 110 VRMS & R l = 3R s

EE 348 – Spring 2001J. Choma, Jr.Slide 47 Average Output Voltage Average Value Calculation Conversion Efficiency Problem

EE 348 – Spring 2001J. Choma, Jr.Slide 48 Semiconductor Diode Schematic Symbol Volt-Ampere Characteristic Equation Parametric Definitions  Q d (t)  Excess Charge Stored In PN Junction  Q d (t)  0: Diode Is Forward Biased  Q d (t) < 0: Diode Is Reverse Biased Or Back Biased    Storage Time Constant (nSec –to- pSec)  v d (t)  Diode Voltage (Generally < 800 mV)  i d (t)  Diode Current (Value Depends On Junction Area)  C j (v d )  Junction Depletion Capacitance

EE 348 – Spring 2001J. Choma, Jr.Slide 49 Semiconductor Diode Models Charge Function Forward Bias Reverse Bias

EE 348 – Spring 2001J. Choma, Jr.Slide 50 Diode At DC Steady State Steady State  Input Voltage Is Constant  Capacitances Behave As Open Circuits Forward Bias Current (V D  0) Reverse Bias Current (V D < 0)

EE 348 – Spring 2001J. Choma, Jr.Slide 51 Diode DC V–I Characteristic Is = 10 fA; T = 27 °C; n = 1

EE 348 – Spring 2001J. Choma, Jr.Slide 52 Piecewise Linear Approximation Two Segment Approximation  I D = 0 For V D  V   I D – I Q = (V D – V Q )/r D For V D  V   I Q  Expected Quiescent, Or DC, Current Through Diode  V Q  Corresponding Quiescent, Or DC, Diode Voltage  r D  Incremental Diode Resistance At (I Q, V Q )  V   Threshold Or Cut In Voltage Of Diode Operation For Diode Voltage Above Threshold  Current  Slope  Threshold

EE 348 – Spring 2001J. Choma, Jr.Slide 53 Piecewise Linear DC Diode Model Model Parameters  Threshold Voltage, V , Generally Around 700 mV For Silicon  For Germanium Diodes, V  Is Closer To 200 mV  Diode Resistance, r D, Generally Around A Few Ohms Emulates Switch With Resistance And Offset  Switch Closed For V D  V  ; Switch Open For V D < V   Generally r D Is Negligibly Small  For Large Applied Voltages, V  Can Often Be Ignored

EE 348 – Spring 2001J. Choma, Jr.Slide 54 Half Wave Rectifier Reverse Bias Forward Bias

EE 348 – Spring 2001J. Choma, Jr.Slide 55 Filtered Half Wave Rectifier Load Resistance, R l, Is Ratio Of Desired DC Output Voltage –To– Desired DC Output Current Diode Conducts (V s  V o + V  )  Capacitor Charges With Time Constant, [R l ||(r D + R s )]C l  For Small Time Constant, Output Voltage Follows Input  Maximum Output Voltage To Which Capacitor Charges:

EE 348 – Spring 2001J. Choma, Jr.Slide 56 Filtering–Cont’d Diode Non-Conductive  Capacitor Voltage Does Not Change Instantaneously  When Capacitor Charges To Its Maximum Voltage And The Input Sinusoid Diminishes from Its Maximum Value, The Diode Open Circuits And The Capacitor Discharges Through The Load Resistance, R l  Diode Begins To Conduct Again When The Unfiltered Output Rises To Meet The Decaying Capacitor Voltage At Time T p. At This Point, The Output Voltage Is V omin  See Plots On Next Slide

EE 348 – Spring 2001J. Choma, Jr.Slide 57 Waveforms: Capacitive Filter t = 0 t = T p V omax V omin Ripple, V r DTDT

EE 348 – Spring 2001J. Choma, Jr.Slide 58 Ripple of Filtered Rectifier Characteristic Voltage Equations Ripple Equations Example Non-Ideal Large Capacitance

EE 348 – Spring 2001J. Choma, Jr.Slide 59 Diode Conduction Time Neighborhood Of Time t = 0 V omax V omin 0 TpTp DTDT Reasonable Result

EE 348 – Spring 2001J. Choma, Jr.Slide 60 Maximum Diode Current Diode Current Occurs At Diode Cut In Point, t = –  T; Load Voltage Nearly Constant At V omax V omax V omin 0 TpTp DTDT

EE 348 – Spring 2001J. Choma, Jr.Slide 61 Transformer Input Ideal Transformer  N Is Turns Ratio; Generally, N >>1  Voltage On Primary Winding Is Stepped Down By Factor Of N  Current In Primary Winding Is Stepped Down By Factor Of N Impedance Transformation  Set V s = 0 To Find Effective Source Resistance Seen By Diode  Marked Resistance Reduction

EE 348 – Spring 2001J. Choma, Jr.Slide 62 Full Wave Rectifier Center–Tapped Transformer Operation  When V s1 Is Positive, V s2 = V s3 > 0  I D2 = 0 & I l = I D1  When V s1 Is Negative, V s2 = V s3 < 0  I D1 = 0 & I l = I D2  Result Is Full Wave Sinusoid For Unfiltered Case

EE 348 – Spring 2001J. Choma, Jr.Slide 63 Full Wave Performance Half Wave Analysis Can Be Replicated With Minor Modifications Unfiltered Average Is Twice As Large As Half Wave Case Because Current Is Now Continually Supplied To Load Ripple Is Factor Of Two Smaller Because Capacitor Now Decays For Only ½ Period  For Same Ripple, Filter Capacitor Can Be ½ As Large In Full Wave Rectifier As In Half Wave Unit  Maximum Diode Current, Expressed In Terms Of Ripple, Is The Same As for Half Wave Case

EE 348 – Spring 2001J. Choma, Jr.Slide 64 Bridge Full Wave Rectifier Operation  When V s > 0, Current Flows From V s Through D1-R l -D1A-Back To V s  When V s < 0, Current Flows From V s Through D2-R l -D2A-Back To V s  Full Wave Unfiltered Output Results Comments  Two Threshold Voltages In Each Current Path  Does Not Require Center Tap Transformer