Jan M. Rabaey The Devices Digital Integrated Circuits© Prentice Hall 1995 Introduction
Goal of this chapter Digital Integrated Circuits© Prentice Hall 1995 Introduction
The Diode n p p n BA SiO 2 Al A B A B Cross-section of pn-junction in an IC process One-dimensional representationdiode symbol Digital Integrated Circuits© Prentice Hall 1995 Introduction
Depletion Region Digital Integrated Circuits© Prentice Hall 1995 Introduction
Diode Current Digital Integrated Circuits© Prentice Hall 1995 Introduction
Models for Manual Analysis Digital Integrated Circuits© Prentice Hall 1995 Introduction
Junction Capacitance Digital Integrated Circuits© Prentice Hall 1995 Introduction
Diode Switching Time Digital Integrated Circuits© Prentice Hall 1995 Introduction
Secondary Effects Digital Integrated Circuits© Prentice Hall 1995 Introduction
Diode Model Digital Integrated Circuits© Prentice Hall 1995 Introduction
SPICE Parameters Digital Integrated Circuits© Prentice Hall 1995 Introduction
The MOS Transistor Digital Integrated Circuits© Prentice Hall 1995 Introduction
Cross-Section of CMOS Technology Digital Integrated Circuits© Prentice Hall 1995 Introduction
MOS transistors Types and Symbols D S G D S G G S DD S G NMOS Enhancement NMOS PMOS Depletion Enhancement B NMOS with Bulk Contact Digital Integrated Circuits© Prentice Hall 1995 Introduction
Transistor: No Voltages Digital Integrated Circuits© Prentice Hall 1995 Introduction
Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Transistor “Off” V gs <V t V gd V gs I ds V ds I=V/R No Channel exists: Enhancement mode transistor R V ds does not matter I ds
Threshold Voltage: Concept Digital Integrated Circuits© Prentice Hall 1995 Introduction
The Threshold Voltage Digital Integrated Circuits© Prentice Hall 1995 Introduction GND Out ? A B Body Effect
Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Channel Formation V gs >V t V gd V gs I ds V ds I=V/R Positive Charge on Gate: Channel exists, but no current since V ds = 0 R I ds
Current-Voltage Relations Digital Integrated Circuits© Prentice Hall 1995 Introduction
Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Linear Region V gs >V t & V gd >V t Positive Charge on Gate: Channel exists, Current Flows since V ds > 0 I ds = k’(W/L)((V gs -V t )V ds -V ds 2 /2) R V gd V gs I ds V ds I=V/R R= 1/(k’(W/L)(V gs -V t )) I ds
Transistor in Saturation Digital Integrated Circuits© Prentice Hall 1995 Introduction
Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Saturation: V gs >V t & V gd <V t Positive Charge on Gate: Channel exists, Current Flows since V ds > 0 But: channel is “pinched off” I ds = (k’/2)(W/L)(V gs -V t ) 2 V gd V gs I ds “constant current source” I ds V ds V gs I ds
Current-Voltage Relations Digital Integrated Circuits© Prentice Hall 1995 Introduction
I-V Relation Digital Integrated Circuits© Prentice Hall 1995 Introduction
A model for manual analysis Digital Integrated Circuits© Prentice Hall 1995 Introduction
Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Saturation Effects Which is the resistor? Discharge of 1pf capacitor, with Vgs of 3,4,5 volts. Also, 12k resistor.
Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Regions of Operation Summary
Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Computed Curves Vgs = 5v Vgs = 4.5v Vgs = 4.0v Linear Resistor
Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Spice Curves Vgs = 5v Vgs = 4v Vgs = 3v Vgs = 2v Vgs = 1v
Fitting level-1 model for manual analysis Digital Integrated Circuits© Prentice Hall 1995 Introduction
Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Retrofitted Level 1 Parameters 1.2um CMOS l NMOS »V TO = V »K’ = 19.6 A/V 2 (20 vs 80) = 0.06 V -1 l PMOS »V TO = V »K’ = 5.4 A/V 2 (5 vs 27) = 0.19 V -1
Dynamic Behavior of MOS Transistor Digital Integrated Circuits© Prentice Hall 1995 Introduction
The Gate Capacitance Digital Integrated Circuits© Prentice Hall 1995 Introduction
Average Gate Capacitance Most important regions in digital design: saturation and cut-off Different distributions of gate capacitance for varying operating conditions Digital Integrated Circuits© Prentice Hall 1995 Introduction
Diffusion Capacitance Digital Integrated Circuits© Prentice Hall 1995 Introduction
The Sub-Micron MOS Transistor Digital Integrated Circuits© Prentice Hall 1995 Introduction
Parasitic Resistances Digital Integrated Circuits© Prentice Hall 1995 Introduction
Velocity Saturation (2) Digital Integrated Circuits© Prentice Hall 1995 Introduction
Sub-Threshold Conduction Digital Integrated Circuits© Prentice Hall 1995 Introduction
Latchup Digital Integrated Circuits© Prentice Hall 1995 Introduction
SPICE MODELS Digital Integrated Circuits© Prentice Hall 1995 Introduction
MAIN MOS SPICE PARAMETERS Digital Integrated Circuits© Prentice Hall 1995 Introduction
SPICE Parameters for Parasitics Digital Integrated Circuits© Prentice Hall 1995 Introduction
SPICE Transistors Parameters Digital Integrated Circuits© Prentice Hall 1995 Introduction
Technology Evolution Digital Integrated Circuits© Prentice Hall 1995 Introduction
Spice Parameters for Parasitics Digital Integrated Circuits© Prentice Hall 1995 Introduction
Process Variations Digital Integrated Circuits© Prentice Hall 1995 Introduction
Impact of Device Variations Digital Integrated Circuits© Prentice Hall 1995 Introduction