TLA5000B Series Logic Analyzer Fact Sheet Breakthrough solutions for real-time digital systems analysis Featuring:  125 ps-resolution MagniVu™ acquisition simultaneous with timing or state acquisition to find elusive timing problems quickly, without double probing  Glitch and T S /T H violation triggering and display to find elusive hardware problems  500 ps (2 GHz)/32 Mb timing record length to capture intermittent events over a wide time window  235 MHz state acquisition provides analysis of high- speed synchronous digital circuits  Automated drag-and-drop measurements ensure faster setup and analysis for common tasks  Drag-and-drop triggers simplify the task of isolating problems and data of interest  iView™ time-correlated digital-analog view to clearly see how analog anomalies affect your digital signals The power you need, the simplicity you want, a price you can afford Combine debug power with simplicity and affordability FeaturesBenefits MagniVu™ acquisitionAvoid missing events completely in either timing or state acquisition mode with higher sampling resolution (up to 20 ps) on all channels Flagging the glitchRemove the need to manually search all channels using exclusive ability to show both the time and channel where the glitch occurred T S /T H violation triggeringEliminate the time consuming and complex task of monitoring the circuit’s outputs with real-time violation triggering that automatically acquires intermittent setup and hold violations Automated measurementsEasily summarize your design’s performance with sophisticated measurements such as: frequency, period, pulse width, duty cycle, and edge count Drag & drop triggersQuickly isolate events through simple and intuitive trigger setup. Triggers include: Channel Edge, Channel Value, Bus Value, Multi-Group Value, Glitch, Setup and Hold Violation, or Trigger on Anything iView™ displayGain complete system visibility with time-correlated, integrated analog and digital data on one display

Key ApplicationsBenefits  FPGA  Easily measure signals inside Altera or Xilinx FPGA designs and select which group of internal signals to probe without having to recompile  Serial data  Identify T S /T H violations quickly with drag-and-drop triggering  Signal integrity  Find elusive glitches and events with MagniVu™ acquisition’s high speed timing resolution of up to 20 ps Key specifications and ordering information 2/11 JS/WOW 58W TLA5000B Series Logic Analyzer Fact Sheet © 2011 Tektronix Models Channels (per module) State Clock Rate Record Length (Qtr/Half/Full CH) Timing (Qtr/Half/Full CH) Timing (MagniVu™ acquisition) TLA5201B34235 MHz 8/4/2 Mb to 128/64/32 Mb 500 ps / 1 ns / 2 ns125 ps TLA5202B68235 MHz 8/4/2 Mb to 128/64/32 Mb 500 ps / 1 ns / 2 ns125 ps TLA5203B MHz 8/4/2 Mb to 128/64/32 Mb 500 ps / 1 ns / 2 ns125 ps TLA5204B MHz 8/4/2 Mb to 128/64/32 Mb 500 ps / 1 ns / 2 ns125 ps Key Options Opt. 1CAdd iView™ external oscilloscope interface kit Opt. 8SIncrease to 8 Mb base record length per channel Opt. 9SIncrease to 32 Mb base record length per channel Opt. R55 year repair service plan Recommended Probes and Accessories PG3ACABDigital pattern generator in a separate chassis A wide variety of probes are recommended, including: P channel general-purpose probe with single- ended data/clock with separable podlets and accessories P channel high-density compression probe, with single-ended data/clock and accessories P channel high-density Mictor probe with single-ended data/clock and accessories P channel high-density D-Max® probing technology probe with single-ended data/clock and accessories