1 Design Review Slow Control Part Hervé MATHEZ IPNL CNRS SLOW CONTROL PART IN FPPA 2000/2001

2 Design Review Slow Control Part Hervé MATHEZ IPNL CNRS LEAKAGE CURRENT SPECIFICATIONS  Input : 20nA to 20µA for twin APD  Leakage current return to ground (only FPPA gnd point) No schematic changes between FPPA2000 and FPPA2001  APD anode voltage must be stabilized at ± 25 mV (Rp, HV)  Minimum leakage current to be measured ± 200 nA (Il(T),  T)  Non linearity over full scale is 1%  Low input bias current amplifier  Output 0.5 V to 2.5V compatible with FPU input

3 Design Review Slow Control Part Hervé MATHEZ IPNL CNRS TEMPERATURE MEASUREMENT SPECIFICATIONS  Range : 5°C to 25°C   T to be measured : ± 0.1°C  Current measurement through a thermistor (R 25°C = 100 k ,  = 3960 K) between 2 constant voltages (2.4V and 1.2V, self heating)  Input current : 4.3 µA to 12 µA 18°C, 0.1°C is 40 nA  Constant voltage must stabilized at ±5 mV  Non linearity : 0.3%  Output 0.5 V to 2.5V compatible with FPU input No schematic changes between FPPA2000 and FPPA2001

4 Design Review Slow Control Part Hervé MATHEZ IPNL CNRS C*V ref ADC + - HV APD RfRf RpRp V out (I Leakage ) ADC Output = f (V refADC,R f ) External components OTA2 Open loop gain 90dB, Fc< 1kHz, with output capacitor of 5pF Phase margin  80° (Also used in temperature measurement) OTA1 is modified in order to Vanode APD goes to 0V Open loop gain 65dB, Fc< 20kHz, with output capacitor of 5pF Phase margin  80° HOW TO DO LEAKAGE CURRENT MEASUREMENT ? OTA1 OTA2

5 Design Review Slow Control Part Hervé MATHEZ IPNL CNRS C*V ref ADC + - V out (dummy) RfRf RfRf C*V ref ADC - - B*V ref ADC A*V ref ADC R off R(T) R dummy V CC V out (T) A*V ref ADC ADC Output = f (R(T),R off,R f ) External components All same OTA have input bias current compensated HOW TO DO TEMPERATURE MEASUREMENT ?

6 Design Review Slow Control Part Hervé MATHEZ IPNL CNRS OTA FOR BOTH MEASUREMENTS OTA 1 OTA 2 GdB=90 dB Phase Margin=80° GdB=65 dB Phase Margin=80°

7 Design Review Slow Control Part Hervé MATHEZ IPNL CNRS LEAKAGE CURRENT MONTE CARLO ANALYSIS (FPPA2000) 0.5 V < Vout < 2.5 V  < 1 %

8 Design Review Slow Control Part Hervé MATHEZ IPNL CNRS LEAKAGE CURRENT MONTE CARLO ANALYSIS (FPPA2000)  V anode APD  1.4 mV

9 Design Review Slow Control Part Hervé MATHEZ IPNL CNRS LEAKAGE CURRENT MONTE CARLO ANALYSIS (FPPA2000) Input Bias Current < 50 nA (except for 5 MC run) Very low variation versus input current

10 Design Review Slow Control Part Hervé MATHEZ IPNL CNRS TEMPERATURE MEASUREMENT MONTE CARLO ANALYSIS (FPPA2000) 0.5 V < Vout < 2.5 V  << 0.1 %

11 Design Review Slow Control Part Hervé MATHEZ IPNL CNRS TEMPERATURE MEASUREMENT MONTE CARLO ANALYSIS (FPPA2000) 1.2 V Voltage variation across R(T) over the full range Offset current for 50 MC run

12 Design Review Slow Control Part Hervé MATHEZ IPNL CNRS SUMMURAY OF MONTE CARLO ANALYSIS (FPPA2000) Temperature Input Current Leakage Input Current Additional BJT to provide high reverse voltage Base-Emitter noticed by MC simulations All other simulations (transient) are correct Offset Current Ouput Voltage reference

13 Design Review Slow Control Part Hervé MATHEZ IPNL CNRS CONCLUSION (FPPA2000) SLOW CONTROL PART WORKS WELL AND ALL MEASUREMENTS ARE IN SPECIFICATION