FPGA Switch Block Design Dr. Philip Brisk Department of Computer Science and Engineering University of California, Riverside CS 223.

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Presentation transcript:

FPGA Switch Block Design Dr. Philip Brisk Department of Computer Science and Engineering University of California, Riverside CS 223

FPGA Architecture (Recap)

Routing Instance and an S Block

Flexibility of Interconnection Structures for Field- Programmable Gate Arrays J. Rose and S. Brown, IEEE Journal of Solid-State Circuits 25(3): , Mar. 1991

Key Questions What is the effect of C Block flexibility on routing completion rate? What is the effect of S Block flexibility on routing completion rate? How do S and C Block flexibilities interact? What is the effect of S and C Block flexibilities on the number of tracks per channel to achieve 100% routability?

Switch Block Flexibility Total number of possible connections offered to each incoming wire

Switch Block Routability Cannot route from A to B Can route from A to B – Assymmetric about horizontal and vertical axes F s = 2

Example Connection Block

Routability Study (One Benchmark) W = 14 Increasing F S improves routability, but F C must be high to achieve 100% routability Routing completion rate approaches 100% when F C > ½W Routing completion rate is low for low values of F C

Routability Study (One Benchmark) W = 14 If F C is high enough, then low values of F S can achieve 100% routability The number of different paths between the initial physical pin and the terminating C Block of a two- pin wire is given by: where N is the number of S Blocks on the global path For lower values of F C, increasing F S improves routability up to a point

S Block vs. C Block Flexibility Avg. F C /W for 100% routing completion A more flexible S Block can compensate for a less flexible C Block

Track Count Requirement for BNRE to Achieve 100% Routability

Conclusion C Blocks should have high flexibility to achieve high-percentage routing completion S Blocks require limited flexibility With low flexibility, only a few extra tracks more than the minimum can achieve 100% routability

Universal Switch Modules for FPGA Design Y-W. Chang et al., ACM Transactions on Design Automation for Electronic Systems 1(1): , Jan. 1996

Overview A Switch Block with larger routing capacity has better area-performance in FPGA routing – Increased connectivity of routing components – Equivalence of LUT/CLB inputs permits pin permutations, which yields highly optimal routing – Most nets are short 60% of nets route through at most 2 Switch Blocks 90% of nets route through at most 5 Switch Blocks Tradeoff between routing capacity and area

Universal Switch Module Definition Routing Resource Vector (RRV): N = (n 1, n 2, n 3, n 4, n 5, n 6 ), 0 < n i < W Example: N = (1, 0, 1, 1, 0, 0) is routable on the following: n1n1 n4n4 n3n3 A Switch Block of size W is universal if the following inequalities are sufficient to determine of an RRV is routable:

Examples

Universal Sub-modules A sub-module of a Universal switch is also universal (but for a smaller W)

Theoretical Results A universal S Block can be constructed with at least 6W switches Any S Block constructed with less than 6W switches cannot be universal

Non-universal S Blocks Disjoint Switch Block (Xilinx XC4000 series) Antisymmetric Switch Block (Rose and Brown, 1991)

Channel Width Required for 100% Routing Capacity (One Benchmark)

Conclusion Universal S Blocks offer better routability than disjoint and antisymmetric S Blocks Algorithm presented to generate S Blocks that are universal (not discussed)

Architectures and Algorithms for Field-Programmable Gate Arrays with Embedded Memory S. Wilton, Ph.D. Thesis, University of Toronto, 1997 (Section 6.1.2)

S Blocks DisjointUniversalWilton Start with Universal S Block, and rotate the diagonal connections by one track

FPGA Routing Structures: A Novel Switch Block and Depopulated Interconnect Matrix Architectures M. I. Masud, M.S. Thesis, University of British Columbia, 1998

Routing with a Disjoint S Block Routing fabric partitioned into domains Cannot cross domains (using routing only)

Routing with a Wilton S Block Eliminates domain choice problem Many more routing choices are available

Implementation Details Wilton Disjoint Wilton Disjoint Area Overhead

Imran S Block Routability of Wilton S Block Implementation efficiency of Disjoint S Block

Imran S Block (1)Tracks that terminate at the S Block Wilton topology (2)Tracks that pass through the S Block Disjoint topology

Area Results

Delay Results

Channel Width Results

Conclusion Imran Switch Block – Routability of Wilton Switch Block – Area-efficiency of Disjoint Switch Block