CMP 301A Computer Architecture 1 Lecture 4. Outline zVirtual memory y Terminology y Page Table y Translation Lookaside Buffer (TLB)

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Presentation transcript:

CMP 301A Computer Architecture 1 Lecture 4

Outline zVirtual memory y Terminology y Page Table y Translation Lookaside Buffer (TLB)

Basic Terminology zMain memory acts as a cache for secondary storage “magnetic disk” zPage : Virtual memory block “similar to cache block” zPage Fault: Virtual memory miss “similar to cache miss” zVirtual address: Address generated by the processor zPhysical address: Actual address to access the main memory zAddress Translation: Mapping virtual address to physical one

Virtual to physical Address Mapping

Page Table zVirtual to physical translation zIndexed by the virtual page number to generate the physical address zEach program has its own page table in memory zA special hardware register, page table register is used to point to the beginning of the table zPage table register should be save in context switching (like PC,...etc) zPage table has a V bit to indicate whether the page is in the memory or not yIf V=0, the operating system takes control to bring this page from the magnetic disk.

Physical address Generation zExample: For 32-bit virtual address, 4KB pages, 4B per page table entry. What is the total size of a page table? Solution: (4GB/4kB)*4B=4MB

Making Address Translation Fast: The TLB zEvery memory access take twice as long: get physical address then get data zTo speed up: cache the most recent translation in a Translation Lookaside Buffer (TLB)  By the principle of locality, it will be needed soon

8 Putting it all together