Penn ESE534 Spring 2014 -- DeHon 1 ESE534: Computer Organization Day 11: March 3, 2014 Instruction Space Modeling 1.

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Presentation transcript:

Penn ESE534 Spring DeHon 1 ESE534: Computer Organization Day 11: March 3, 2014 Instruction Space Modeling 1

Penn ESE534 Spring DeHon 2 Last Time Instruction Requirements Instruction Space

Architecture Taxonomy Penn ESE534 Spring DeHon 3 PCsPints/PCdepthwidthArchitecture 0N11FPGA 1N (48,640)81Tabula ABAX (A1EC04) Scalar Processor (RISC) 1NDWVLIW (superscalar) 11SmallW*NSIMD, GPU, Vector N1DWMIMD 161 (4?) core

Penn ESE534 Spring DeHon 4 Today Model Architecture from Instruction Parameters –implied costs –gross application characteristics Focus on width as example –Instruction depth on Wed.

Penn ESE534 Spring DeHon 5 Quotes If it can’t be expressed in figures, it is not science; it is opinion. -- Lazarus Long

Penn ESE534 Spring DeHon 6 Modeling Why do we model?

Penn ESE534 Spring DeHon 7 Motivation Need to understand –How costly is a solution Big, slow, hot, energy hungry…. –How compare to alternatives –Cost and benefit of flexibility

Penn ESE534 Spring DeHon 8 What we really want: Complete implementation of our application For each architectural alternatives –In same implementation technology –w/ multiple area-time points

Penn ESE534 Spring DeHon 9 Reality Seldom get it packaged that nicely –much work to do so –technology keeps moving We must deal with –estimation from components –technology differences –few area-time points

Penn ESE534 Spring DeHon 10 Modeling Instruction Effects Restrictions from “ideal” +save area and energy –limit usability (yield) of PE May cost more energy, area in the end… Want to understand effects –Area, energy model –utilization/yield model

Preclass Energies? –8-bit, 16-bit, 32-bit, 64-bit 16-bit on 32-bit? –Sources of inefficiency? 8-bit operations per 64-bit operation? 64-bit on 8-bit? –Sources of inefficiency? Penn ESE534 Spring DeHon 11

Area Target Switch focus to area-efficiency –Equivalently computational density Come back to energy-efficiency at end of lecture Penn ESE534 Spring DeHon 12

Efficiency/Yield Intuition (Area) What happens when –Datapath is too wide? –Datapath is too narrow? –Instruction memory is too deep? Penn ESE534 Spring DeHon 13

Efficiency/Yield Intuition (Area) What happens when –Datapath is too wide? –Datapath is too narrow? –Instruction memory is too deep? –Instruction memory is too shallow? Penn ESE534 Spring DeHon 14

Penn ESE534 Spring DeHon 15 Computing Device Composition –Bit Processing elements –Interconnect: space –Interconnect: time –Instruction Memory Tile together to build device

Penn ESE534 Spring DeHon 16 Computing Device

Penn ESE534 Spring DeHon 17 Computing Device Composition –Bit Processing elements –Interconnect: space –Interconnect: time –Instruction Memory Tile together to build device

Penn ESE534 Spring DeHon 18 Relative Sizes Bit Operator 3-5KF 2 Bit Operator Interconnect 200K-250KF 2 Instruction (w/ interconnect) 20KF 2 Memory bit (SRAM) F 2

Penn ESE534 Spring DeHon 19 Model Area

Penn ESE534 Spring DeHon 20 Architectures Fall in Space

Calibrate Model Arch.wdckArea (F 2 ) FPGA K Altera 8K230K Xilinx 4K160K SIMD K Abacus48K Processor K MIPS-X530K Penn ESE534 Spring DeHon 21

Penn ESE534 Spring DeHon 22 Peak Densities from Model

Penn ESE534 Spring DeHon 23 Peak Densities from Model Only 2 of 4 parameters –small slice of space –100  density across Large difference in peak densities –large design space!

Penn ESE534 Spring DeHon 24 Architectural parameters  Peak Densities

Penn ESE534 Spring DeHon 25 Efficiency What do we really want to maximize? –Not peak, “guaranteed not to exceed” performance, but… –Useful work per unit silicon [per Joule] Yield Fraction / Area (or minimize (Area/Yielded performance) )

Penn ESE534 Spring DeHon 26 Efficiency For comparison, look at relative efficiency to ideal. Ideal = architecture exactly matched to application requirements Efficiency = A ideal /A arch A arch = Area Op/Yield

Penn ESE534 Spring DeHon 27 Width Mismatch Efficiency Calculation

Penn ESE534 Spring DeHon 28 Efficiency: Width Mismatch c=1, 16K PEs

Application Needs What are common application datawidths? Penn ESE534 Spring DeHon 29

Energy Target Switch to energy focus for rest of lecture Penn ESE534 Spring DeHon 30

Efficiency for Preclass Preclass 6 table Penn ESE534 Spring DeHon 31

Robust Point Can we find an architecture that –Is reasonably efficient regardless of application needs? –never less efficient than 50% ? Penn ESE534 Spring DeHon 32

Robust Point What is Energy Robust Point for preclass model? Penn ESE534 Spring DeHon 33

Penn ESE534 Spring DeHon 34 Big Ideas [MSB Ideas] Applications typically have structure Exploit this structure to reduce resource requirements Architecture is about understanding and exploiting structure and costs to reduce requirements

Penn ESE534 Spring DeHon 35 Admin HW4 grading…in progress Office hours on Tuesday HW5.1 Due Wed. Reading for Wed. –Finish chapter