Renesas Electronics America Inc. © 2010 Renesas Electronics America Inc. All rights reserved. ID 115C: Low Pin Count V850: Small but Powerful MCU for portable application Bobby Wong V850 Product Marketing Manager 12 October 2010 Version: 1.0

2 © 2010 Renesas Electronics America Inc. All rights reserved. Mr. Bobby Wong V850 Product Marketing Manager Conduct competitive analysis and product positioning Responsible for product launch and next generation product definition Previous Experience Over 10 years experience in embedded system/ASIC design Intel IA64 benchmarking and architecture research Infineon TriCore and Tensilica Xtensa processor IP application Holds a BS EECS from UC Berkeley Holds a MSEE degree from Stanford University

3 © 2010 Renesas Electronics America Inc. All rights reserved. Renesas Technology and Solution Portfolio Microcontrollers & Microprocessors #1 Market share worldwide * Analog and Power Devices #1 Market share in low-voltage MOSFET** Solutions for Innovation ASIC, ASSP & Memory Advanced and proven technologies * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 **Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis).

4 © 2010 Renesas Electronics America Inc. All rights reserved. 4 Renesas Technology and Solution Portfolio Microcontrollers & Microprocessors #1 Market share worldwide * Analog and Power Devices #1 Market share in low-voltage MOSFET** ASIC, ASSP & Memory Advanced and proven technologies * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 **Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis). Solutions for Innovation

5 © 2010 Renesas Electronics America Inc. All rights reserved. 5 Microcontroller and Microprocessor Line-up Superscalar, MMU, Multimedia  Up to 1200 DMIPS, 45, 65 & 90nm process  Video and audio processing on Linux  Server, Industrial & Automotive  Up to 500 DMIPS, 150 & 90nm process  600uA/MHz, 1.5 uA standby  Medical, Automotive & Industrial  Legacy Cores  Next-generation migration to RX High Performance CPU, FPU, DSC Embedded Security  Up to 10 DMIPS, 130nm process  350 uA/MHz, 1uA standby  Capacitive touch  Up to 25 DMIPS, 150nm process  190 uA/MHz, 0.3uA standby  Application-specific integration  Up to 25 DMIPS, 180, 90nm process  1mA/MHz, 100uA standby  Crypto engine, Hardware security  Up to 165 DMIPS, 90nm process  500uA/MHz, 2.5 uA standby  Ethernet, CAN, USB, Motor Control, TFT Display High Performance CPU, Low Power Ultra Low Power General Purpose

6 © 2010 Renesas Electronics America Inc. All rights reserved. 6 Microcontroller and Microprocessor Line-up Superscalar, MMU, Multimedia  Up to 1200 DMIPS, 45, 65 & 90nm process  Video and audio processing on Linux  Server, Industrial & Automotive  Up to 500 DMIPS, 150 & 90nm process  600uA/MHz, 1.5 uA standby  Medical, Automotive & Industrial  Legacy Cores  Next-generation migration to RX High Performance CPU, FPU, DSC Embedded Security  Up to 10 DMIPS, 130nm process  350 uA/MHz, 1uA standby  Capacitive touch  Up to 25 DMIPS, 150nm process  190 uA/MHz, 0.3uA standby  Application-specific integration  Up to 25 DMIPS, 180, 90nm process  1mA/MHz, 100uA standby  Crypto engine, Hardware security  Up to 165 DMIPS, 90nm process  500uA/MHz, 2.5 uA standby  Ethernet, CAN, USB, Motor Control, TFT Display High Performance CPU, Low Power Ultra Low Power General Purpose V850 Branch/LD Pipe Memory Write Back Instruction Fetch Data Forward Operand Decode Execute Write Back High Performance Low Power VERY Small Packages

7 © 2010 Renesas Electronics America Inc. All rights reserved. Innovation Oscilloscope Thermal Printer Scanner Heat Scanner Medical equipment DJ Mixer Systems are smaller Designs are not less complicated Battery-operated

8 © 2010 Renesas Electronics America Inc. All rights reserved. V850 Low Pin Count Microcontrollers Renesas offers a family of V bit Microcontrollers that are High Performance, Low Power and are available in Small Packages.

9 © 2010 Renesas Electronics America Inc. All rights reserved. Agenda Design Consideration of High Performance and Low Power Portable Application V850 energy efficient architecture Many small packages to support design Features Supporting Low Power Portable Application

10 © 2010 Renesas Electronics America Inc. All rights reserved. Key Takeaways By the end of this session you will be able to: Understand the Energy Efficient V850ES MCUs Understand the different small packages Understand the different operating modes and features of V850ES for your portable application

11 © 2010 Renesas Electronics America Inc. All rights reserved. Portable Application Requirements Heat Scanner Medical equipment DJ Mixer Oscilloscope Thermal Printer Scanner

12 © 2010 Renesas Electronics America Inc. All rights reserved. 12 Leading Performance of V850ES MCU MIPS32®24K®  1.5 DMIPS/MHz ARM 7  0.95 DMIPS/MHz AVR32 UC3  1.49 DMIPS/MHz STM32 (Cortex M3)  1.25 DMIPS/MHz ColdFire V2  0.94 DMIPS/MHz(SRAM) ColdFire V2  0.76 DMIPS/MHz (Flash) V850 cores have leading performance in the industry ARM 9  1.04 DMIPS/MHz 1) Based on DMIPS v2.1 2) Numbers are based on publicly available data sheets from the vendors 3) Data as of 2010/08/17 V850ES  1.9 DMIPS/MHz

13 © 2010 Renesas Electronics America Inc. All rights reserved. Low Power Design Problem Design Requirements Performance – 40DMIPS (version 2.1) Run at Maximum Performance for 1ms/second STOP for the remainder of the second DMIPS (2.1) 2 DMIPS/MHzCPU Freq. 1 Run Current 3.3V 25C 1 A Cortex M3-based MCU 40 DMIPS MHz (Flash access needs 1 wait state) 17.3mA V850ES/Jx3-L39 DMIPS1.9520MHz12mA Design Choices Time Current Run Stop Cortex M3 Based MCU V850ES/Jx3-L 1 1 Based on values from specification stated in product datasheet 2 Based on internal benchmarking

14 © 2010 Renesas Electronics America Inc. All rights reserved.

15 © 2010 Renesas Electronics America Inc. All rights reserved. How Small are the Packages? 24.26mm 17.91mm 80p 12mm 64p 48p 10mm 7mm LQFP Packages (0.5mm Pitch) WQFN Packages (0.5mm Pitch) 48p 7mm 40p 6mm BGA Packages (0.65/0.5mm Pitch) 64p 5mm 113p 8mm Only a small selection of packages WQFN package 0.75mm Thinness

16 © 2010 Renesas Electronics America Inc. All rights reserved. 16 © 2010 Renesas Electronics America Inc. All rights reserved. V850 Bus Architecture CPU Instruction Fetch Operand Data Access Instruction Bus Data Bus On-chip Flash On-chip RAM Bus Arbitration External Memory External Devices On-chip Peripherals DMA Control External Bus Control V850 MCU

17 © 2010 Renesas Electronics America Inc. All rights reserved. Enhanced Pipeline Delivering High Performance Instruction Fetch Operand Decode Execute Memory Write Back Branch/LD Pipe Memory Write Back Instruction Fetch Data Forward Early address calculation reduces branch penalty or load cycle Load/Store Buffer reduces 1 clock cycle With Load/Store Buffer Early Address Calculation Regular 5-stage pipeline Enhanced 5-stage pipeline delivers 1.9 DMIPS/MHz

18 © 2010 Renesas Electronics America Inc. All rights reserved. Enhanced Pipeline Delivering High Performance Instruction Fetch Operand Decode Execute Memory Write Back Traditional 5-stage Pipeline: Branch R1, R2, Immediate Branch/LD Pipe Memory Write Back Instruction Fetch Data Forward Operand Decode Execute Write Back Enhanced V850ES 5-stage Pipeline: BCOND, Immediate CLK2: Resolve registers CLK3: Compare and Calculate Target address CLK1: Branch instruction is fetched CLK2: Branch uses Condition Flag to decide Calculate Target address CLK1: Branch instruction is fetched Reduce 1 cycle

19 © 2010 Renesas Electronics America Inc. All rights reserved. Enhanced Pipeline Delivering High Performance Instruction Fetch Operand Decode Execute Memory Write Back Traditional Pipeline: Load R1, R2, Immediate Branch/LD Pipe Memory Write Back Instruction Fetch Data Forward Operand Decode Execute Write Back Enhanced V850ES Pipeline: SLOAD R1, Immediate CLK2: Resolve registers CLK3: Calculate Target address CLK1: LOAD instruction is fetched CLK2: Add Immediate to a special register to calculate Target address CLK1: SLOAD instruction is fetched CLK4: Load is executed CLK3: Load is executed Reduce 1 cycle

20 © 2010 Renesas Electronics America Inc. All rights reserved. Enhanced Pipeline Delivering High Performance Instruction Fetch Operand Decode Execute Memory Write Back Traditional Pipeline: Load could stall pipe Branch/LD Pipe Memory Write Back Instruction Fetch Data Forward Operand Decode Execute Write Back Enhanced V850ES Pipeline: Load/Store buffer reduces stall CLK2: Load CLK3: Load CLK1: LOAD CLK4: Load is could stall the pipe CLK2: Next InstCLK3: Next Inst CLK4: Next inst. LOAD Next Inst

21 © 2010 Renesas Electronics America Inc. All rights reserved. Instruction Set For Performance and Fast Control Fast computation Saturated arithmetic operation 16x16 hardware multiplier to support fast multiplication Single cycle shift with barrel shift hardware Single cycle bit manipulation operation Single cycle byte swap Fast Response Conditional Branch – Branch based on Flag (C, Z and etc) hide 1 clock latency Table of Function Call – Faster address calculation for long call

22 © 2010 Renesas Electronics America Inc. All rights reserved. High Performance = Low Power? Delivering High Performance and Low Power at the same time sounds like a contradiction? Higher Performance delivered by raising frequency will not reduce power Delivering more processing power by DMIPS/MHz can reduce power consumption Doing more work at a lower operating frequency means low power and low EMI!!

23 © 2010 Renesas Electronics America Inc. All rights reserved. 23 V850ES Energy Efficiency Enhanced pipeline delivers high performance at 1.9DMIPS/MHz (v2.1) V850ES can operate at a lower frequency to achieve the same processing performance as Cortex-M3 (1.25 DMIPS/MHz) 1 Lower frequency consumes less power 1 Source: 2 Based on values from specification stated in product datasheet 3 Based on internal benchmarking DMIPS (2.1) 2 DMIPS/ MHz CPU Freq. 1 Run Current 3.3V 25C 1 Energy Efficiency A Cortex M3-based MCU 40 DMIPS MHz (Flash access needs 1 wait state) 17.3mA0.4mA/DMIPS V850ES/Jx3-L39 DMIPS1.9520MHz12mA0.3mA/DMIPS

24 © 2010 Renesas Electronics America Inc. All rights reserved. Circuit technique to reduce power in RUN CPU Flash ROM Flash ROM I/O RAM Logic portion 30mA 13mA  Intelligent power management Jx3 Jx3-L Memoryportion  Optimize Clock Tree Structure  Maximize the choice of low drive primitive cell Normal operation current (Typ.)

25 © 2010 Renesas Electronics America Inc. All rights reserved. Flash OFF Circuit technique to reduce power ON/OFF management for Flash Flash ON CPU RAM CPU RAM JG3-L Flash ON/OFF Always Powered ON Powered OFF during no fetch cycle (e.g. DIV execution, 16bit instruction vs. 32bit fetch) Activate all RAM cell Activate only accessed RAM Activation management for RAM

26 © 2010 Renesas Electronics America Inc. All rights reserved. 26 Different Standby Modes and Options Different operation modes to tailor application needs Mode Condition 32kHz Osc. Ckt. Main Osc. Ckt. PLLCPUPeripheralsRegulatorFlashRAM/Register RTCOthers RUNON 2 ONON 2 ON Retained HALTON 2 ONON 2 STOPON Retained IDLE1ON 2 ONON 2 STOPSTOP 1 ON Retained IDLE2ON 2 ONON 2 STOPSTOP 1 ONOFFRetained STOPON 2 STOP STOP 1 Low PowerOFFRetained 1 RTC and some peripherals such as UART can be left on 2 32kHz oscillator/PLL can be switched on/off

27 © 2010 Renesas Electronics America Inc. All rights reserved. Peripherals Support Low Power Design V850ES/Jx3-L Tracks time without waking up MCU Lots of Flash to store data Eliminate EEPROM Track Vdd voltage To manage system UART/CSI opera table When MCU is STOP

28 © 2010 Renesas Electronics America Inc. All rights reserved. Real Time Calendar Embedded registers for Second, Minute and etc Available in some products Second Register Minute Register Hour Register Day Register Week Register 16-bit Sub Count Calibration Register clk Eliminates waking up MCU every ½ second to track the time.

29 © 2010 Renesas Electronics America Inc. All rights reserved. Using Real Time Calendar To Save Current MCU w/ simple timer time current 15 min MCU wakes up 1800 times to update real-time in memory MCU wakes up for processing + time stamping 29 MCU is woken up ½ second to update time Design Requirements MCU wakes up every 15min Do sensing and put time stamp on data MCU w/ RTC time current 15 min MCU is STOP during the 15min

30 © 2010 Renesas Electronics America Inc. All rights reserved. Real Time Calendar Hardware Calibration Register Hardware calibration to compensate crystal variance Simplify factory calibration Support field calibration Adjustment from 61us to 11.3ms in 60 seconds Available in some products Second Register Minute Register Hour Register Day Register Week Register 16-bit Sub Count  Calibration register add/subtract ticks to adjust variance Calibration Register clk

31 © 2010 Renesas Electronics America Inc. All rights reserved. Low Voltage Indicator Support Graceful Shutdown Service Hours Vbattery Lithium Battery Alkaline Battery Graceful Shutdown  Alert users to change battery  Save data in Flash Vdd Low Voltage Indicator Interrupt to CPU MCU

32 © 2010 Renesas Electronics America Inc. All rights reserved. EEPROM Emulation Reduces Component Count MCU EEPROM / Data Flash High Density Flash (Up to 1MB) MCU Allocated Flash for EEPROM Emulation Data1 Data2 Data3

33 © 2010 Renesas Electronics America Inc. All rights reserved. EEPROM Emulation Reduces Component Count Same Data can be written to different physical Flash to extend the number of updates Valid Data First call to EEPROM_WRITE_DATA(data); Physical Flash Allocated Flash for EEPROM Emulation Old Data Second call to EEPROM_WRITE_DATA(data); Physical Flash Allocated Flash for EEPROM Emulation Valid Data Inherently support “last valid” and “unroll”

34 © 2010 Renesas Electronics America Inc. All rights reserved. Serial Interfaces That Can Wake Up MCU MCU Radio + Lower Layer MAC SPI STOP Run to maintain network  Serial Interface can wake up MCU in STOP mode  External device supplies clock and data Design Requirements Wireless sensor network Extend battery life as much as possible

35 © 2010 Renesas Electronics America Inc. All rights reserved. Serial Interfaces That Can Wake Up MCU MCU Radio + Lower Layer MAC SPI data  Serial Interface can wake up MCU in STOP mode  External device supplies clock and data Design Requirements Wireless sensor network Extend battery life as much as possible STOP Run to maintain network RUN Wake up MCU to process

36 © 2010 Renesas Electronics America Inc. All rights reserved. V850ES MCUs Support Low Power Portable Applications High performance V850ES delivers 1.9DMIPS/MHz Energy Efficient for Portable Application V850ES/Jx3-L delivers 0.3mA/DMIPS Small Packages 64-pin WQFN as small as 7x7mm. BGA in 5x5mm Features support Low Power Portable Application Real Time Counter, Low Voltage Indicator, EEPROM Emulation and more

37 © 2010 Renesas Electronics America Inc. All rights reserved. 37 V850ES Jx3 series Commitment to Portable Application Next generation V850ES/Jx4 Today 1.5-2x performance improvement 1.5-2x performance improvement Smaller packages to 33-pin Smaller packages to 33-pin >50% reduction in current consumption >50% reduction in current consumption Specialized peripherals to reduce power Specialized peripherals to reduce power

38 © 2010 Renesas Electronics America Inc. All rights reserved. Innovation Possible Heat Scanner Medical equipment DJ Mixer Oscilloscope Thermal Printer Scanner

© 2010 Renesas Electronics America Inc. All rights reserved. 39 Thank You!

© 2010 Renesas Electronics America Inc. All rights reserved. 40 Appendix

41 © 2010 Renesas Electronics America Inc. All rights reserved. MCU Naming Convention Ｖ８５０ ＥＳ Line up H : 5V GP J : 3V GP M : High end GP I : Motor ASSP ／ＪＧ３ CPU Core Type V850: V850 V850E: V850E1 V850ES: V850ES V850E2: V850E2 －Ｌ Spec/ Pin count C : 40/48pin E : 64pin F : 80pin G : 100pin H : 128pin J : 144pin K : 176pin L : 208pin Option -L : Low Power -H : High Performance/USB -U/-E : USB Host/Ethernet Generation The bigger the number, the later the generation “x” means a wildcard V850ES/Jx3-L, V850ES/Hx3

42 © 2010 Renesas Electronics America Inc. All rights reserved. V850ES/Jx3 62 DMIPS v2.1 V850ES/Jx3 62 DMIPS v2.1 V850ES/Jx3-U 81 DMIPS v2.1 USB Device + Host V850ES/Jx3-U 81 DMIPS v2.1 USB Device + Host V850ES/Jx3-H 81 DMIPS v2.1 USB Device V850ES/Jx3-H 81 DMIPS v2.1 USB Device General Purpose Max Freq: 32MHz Voltage: 2.85 – 3.6V Pins: Flash: KB RAM: KB Connectivity Max Freq: 48MHz Voltage: V Pins: Flash: KB RAM: 8-56KB Max Freq: 48MHz Voltage V Pins: Flash: KB RAM: 48-56KB V850ES/Jx3-L STOP Current 1.5uA V850ES/Jx3-L STOP Current 1.5uA Ultra Low Power General Purpose Max Freq: 20MHz Voltage: V Pins: Flash: KB RAM: KB V850ES/Jx3-E 84 DMIPS v2.1 Eth MAC + USB Device V850ES/Jx3-E 84 DMIPS v2.1 Eth MAC + USB Device Max Freq: 50MHz Voltage: V Pins: Flash: KB RAM: KB Low Power Connectivity V850ES/Jx3-L USB Device V850ES/Jx3-L USB Device Max Freq: 20MHz Voltage V Pins: 100 Flash: KB RAM: 40 KB V850 MCU Products in 2010

43 © 2010 Renesas Electronics America Inc. All rights reserved. 64 KB 32 KB 128 KB 256 KB 384 KB 512 KB 768 KB 1 MB 48pin80pin100pin128pin144pin 16 KB 40pin Scalable Family to Meet Different Cost Structure 64pin Jx3-L Jx3 General Purpose Jx3-L Low Power Jx3 Jx3-L 2010/2011 Product Expansion Jx3-H Jx3-L Jx3-H Jx3-L Jx3-H Jx3-E Jx3-L Jx3-H Jx3-U Jx3-H Jx3-U Jx3-E Jx3 Jx3-L Jx3-H Jx3-U Jx3-H Jx3-U Jx3-E Jx3 Jx3-E Ethernet + USB device Jx3-U USB host + USB device Jx3-H USB device Performance: 39 – 90 DMIPS (v2.1) Packages: 40 – 144 Pins Flash Memory: 16k - 1M bytes Jx3-L Low Power + USB device Jx3-L

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