ELEC4601 Microprocessor systems Lab 3 Tutorial

Slides:



Advertisements
Similar presentations
8259 Programmable Interrupt Controller
Advertisements

Parul Polytechnic Institute
VHDL 8 Practical example
DMA Controller (8237 Programming Examples)
Programmable Interval Timer
Dr A Sahu Dept of Computer Science & Engineering IIT Guwahati.
I/O Unit.
Processor System Architecture
Interrupts What is an interrupt? What does an interrupt do to the “flow of control” Interrupts used to overlap computation & I/O – Examples would be console.
Architectural Support for Operating Systems. Announcements Most office hours are finalized Assignments up every Wednesday, due next week CS 415 section.
1 TK2633TK Microprocessor Architecture DR MASRI AYOB.
Introduction An interrupt is an event which informs the CPU that its service (action) is needed. Sources of interrupts: internal fault (e.g.. divide by.
DEEPAK.P MICROPROCESSORS AND APPLICATIONS Mr. DEEPAK P. Associate Professor ECE Department SNGCE 1.
ELEC4601 Microprocessor systems Lab 4 Tutorial USART and Floating point.
Interrupts. What Are Interrupts? Interrupts alter a program’s flow of control  Behavior is similar to a procedure call »Some significant differences.
ECE-L304 Lecture 6 Review of Step 5 Introduction to Step 6 and 7 Final Lecture Quiz Next Week.
MICROPROCESSOR INPUT/OUTPUT
8086/8088 Hardware Specifications Power supply:  +5V with tolerance of ±10%;  360mA. Input characteristics:  Logic 0 – 0.8V maximum, ±10μA maximum;
Microprocessor Dr. Rabie A. Ramadan Al-Azhar University Lecture 2.
Timers.
 8251A is a USART (Universal Synchronous Asynchronous Receiver Transmitter) for serial data communication.  Programmable peripheral designed for synchronous.
8279 KEYBOARD AND DISPLAY INTERFACING
Interrupts Useful in dealing with: The interface: Random processes;
8259A PROGRAMMABLE INTERRUPT CONTROLLER. CONTINUE…. The 8259A consist of eight data bus lines from D0-D7 The data bus is the path over which data are.
CHAPTER 6 INTERRUPTS AND THE 8259 CHIP. What happens on interrupt? Micro automatically saves (on stack) the FR (flag register), IP (instruction pointer),
Computer Architecture Lecture 2 System Buses. Program Concept Hardwired systems are inflexible General purpose hardware can do different tasks, given.
CSNB374: Microprocessor Systems Chapter 5: Procedures and Interrupts.
ELEC4601 Microprocessors Lab 2 Tutorial Signal Waveforms and Parallel port programming.
Microcontrollers Class : 4th Semister E&C and EEE Subject Code: 06ES42
8254 Timer.
8279 KEYBOARD AND DISPLAY INTERFACING
Programmable Interrupt Controller (PIC)
A Design Example A Programmable Calculator. Programmable Calculator Working in Exact Mode Receiving Program from RS232 Port Saving Programs using RS232.
7. IRQ and PIC ENGI 3655 Lab Sessions. Richard Khoury2 Textbook Readings  Interrupts ◦ Section
14.2: x86 PC AND INTERRUPT ASSIGNMENT
بسم الله الرحمن الرحيم MEMORY AND I/O.
Processor Organization and Architecture Module III.
MICROPROCESSOR DETAILS 1 Updated April 2011 ©Paul R. Godin prgodin gmail.com.
The 8085 Microprocessor Architecture. What 8085 meant for? 80 - year of invention bit processor 5 - uses +5V for power.
 The Programmable Interrupt Controller (PlC) functions as an overall manager in an Interrupt-Driven system. It accepts requests from the peripheral equipment,
KEYBOARD/DISPLAY CONTROLLER - INTEL Features of 8279 The important features of 8279 are, Simultaneous keyboard and display operations. Scanned keyboard.
MICROPROCESSOR INTEL 8086/8088 BY: SERA SYARMILA SAMEON.
Intel 8259A PIC EEE 365 [FALL 2014] LECTURE 21 ATANU K SAHA BRAC UNIVERSITY.
DEPARTMENT OF ELECTRONICS ENGINEERING
FOR MORE CLASSES VISIT   ECET 340 Week 1 HomeWork 1  ECET 340 Week 1 iLab 1  ECET 340 Week 2 HomeWork 2  ECET 340 Week 2 iLab.
Homework Reading Machine Projects Labs
Introduction An interrupt is an event which informs the CPU that its service (action) is needed. Sources of interrupts: Internal fault (e.g.. divide by.
8259-programmable interrupt controller
Presentation On 8259 Made by Md Shabbir Hasan.
8085 Microprocessor Architecture
Programmable Interrupt Controller 8259
Programmable Interrupt Controller 8259
8259 Chip The Intel 8259 is a family of Programmable Interrupt Controllers (PIC) designed and developed for use with the Intel 8085 and Intel 8086 microprocessors.
8253 Timer In software programming of 8085, it has been shown that a delay subroutine can be programmed to introduce a predefined time delay. The delay.
An Introduction to Microprocessor Architecture using intel 8085 as a classic processor
8259 PROGRAMMABLE INTERRUPT CONTROLLER
Timers.
Programmable Interval timer 8253 / 8254
UNIT-V Interrupt structure of Vector interrupt table.
8085 Microprocessor Architecture
8259 Programmable Interrupt Controller
Programmable Interval timer 8253 / 8254
Md. Mojahidul Islam Lecturer Dept. of Computer Science & Engineering
Md. Mojahidul Islam Lecturer Dept. of Computer Science & Engineering
8259 PROGRAMMABLE INTERRUPT CONTROLLER
CNET 315 Microprocessor & Assembly Language
8253 – PROGRAMMABLE INTERVAL TIMER (PIT). What is a Timer? Timer is a specialized type of device that is used to measure timing intervals. Timers can.
Programmable Interrupt Controller (PIC)
Programmable Interval Timer
Presentation transcript:

ELEC4601 Microprocessor systems Lab 3 Tutorial Interrupts

Objectives Interrupt Interrupt controller Timer Display controller

Interrupts 1) Understand Interrupts and their use in a microprocessor-based system “An interrupt results in the transfer of control to a new program location.” What is the sequence of operations that occur during an interrupt? What are the signals that appear on the bus during an interrupt cycle? What is the Interrupt Vector Table and how is it used?

Interrupt Controller (8259A) 2) Understand the Programmable Interrupt Controller (8259A) and it’s interface to the 8086 on the SDK Board What are the key signals that connect the 8259A to the 8086? What is the Interrupt Mask Register and how is it used? How are interrupt priorities handled using the 8259A? ICW1, ICW2, ICW4, OCW1, OCW2.

Timer (8253) 3) Understand the Programmable Interval Timer (8253) What is the function of 8253, and how is it used? How is the 8253 connected to the 8086 and the 8259A (review Appendix B) How are the counters initialized and loaded? What signals are used to clock the counters? Do all counters use the same clock?

Simplified Block Diagram CLK0 IR0 Counter 1 ????H IR1 CLK1 IR2 Counter ????H PCLK 2.45 MHz Counter 2 ????H CLK2 Timer 8253 PIC 8259 Counter 0 holds 5FB4 H = 24,500 d. What is the period for CLK0? 10 ms What is the data needed in counter 1 to get CLK1 period of 1 s? 10,000 d = 2710 H Further study: Appendix B

Parallel Port (8255A) and Keyboard Display Controller (8279) 4) Understand the Parallel Ports chip (8255A) How can the 8255A be used to interface the 8086 to a D/A Converter (review Lab 2) 5) Understand the Keyboard Display Controller (8279) How do you write to display RAM using the 8279? How can you address the 7-segment LEDs on the SDK-86?

Seven Segment Display Table What you need to display “0”? a, b, c, d, e, f Hex: 3F What you need to display “1”? b, c Hex: 06 LED_TABLE DB 3FH ; 0 DB 06H ; 1 ... How can you use it? - LDS, XLAT h h g f e d c b a Bits

Reading Materials for Prelab From your class notes: Communication Between I/O and CPU (pages 122-124) From the Peripherals Handbook: Read about the 8253, 8255, 8259, and 8279 From the 8086 Hardware Reference Manual: Read the section on interrupts. Look up information for the LDS, XLAT, STI, and CLI commands

Interrupt timing diagram Part A Interrupt timing diagram

Part A: Prelab Review the code in lab3A.asm Fill in the blank comments beside the given code in provided spaces ; 8255 Setup CNTR_8255 EQU 0FFFEH ;Port control address OUTPUT_MODE EQU 0B5H ;Set up mode for port B output ; 8253 Setup COUNT_CNTR EQU 000EH ;counter control register address MODE2 EQU 74H ;__________________________________ MODE3 EQU 36H ;__________________________________ COUNT0 EQU 0008H ;counter0 address COUNT1 EQU 000AH ;counter1 address LOPT1MSEC EQU 0F5H ;__________________________________ HIPT1MSEC EQU 00H ;__________________________________ …

Part A: Procedure Download Lab3A.asm to the SDK (masm, link, exe2hex) and run it (sdk, GO FE00:0., L <filename> , G ) Understand what is happening. Hint: This program initializes a couple of counters, then runs in an infinite loop Monitor the bus signals in the Logic Analyzer and copy INTR, /INTA waveforms from into your lab procedure handbook Answer the questions in your report

Programming: timer, ic, display Part B Programming: timer, ic, display

Part B: Prelab Review the code in lab3B.asm and comment the code in the blanks provided (as part A) Write the code section to implement ISR2 which is timed using COUNT2 (counter 2) Write LED_TABLE for 0-9 (use it in ISR2) How can you set ISR2 to run at highest priority?

Part B: Procedure Download Lab3B.asm given on the web to the SDK and run it as it is (do not modify yet). This program generates a sawtooth waveform on the D/A converter and outputs a GARBAGE character to the rightmost digit of the SDK-86 display every second. Make sure it works properly before you modify the code If everything works fine, modify Lab3B.asm according to your code to enable interrupt (ISR2) that generates a counter (0-9) in the leftmost digit of the SDK-86 display. The counter should count down from 9 to 0 and decrement every 0.5 seconds. Your new code must not interfere with the sawtooth or the GARBAGE character routines.

Hints Review the code for Lab#1 part D – look in appropriate sections Understand the use and syntax of LDS, XLAT, LED_TABLE Understand the timer block diagram (8253) – Tutorial + Appendix B How to access ports (control and data registers) – from lab 2

See you next week!