1 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Dr. Travis Doom Wright State.

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1 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Dr. Travis Doom Wright State University Computer Science and Engineering A beginning engineer’s guide to the digital computer

2 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering What is a computer? l What is computation? l There are many sorts of computing devices, they fall into two categories: –Analog: machines that produce an answer that measures some continuous physical property such as distance, light intensity, or voltage. Examples? –Digital: machines that perform computations by manipulating a fixed finite set of elements. Examples? –The difficulty with analog devices is that it is very hard to increase their accuracy. l Before modern digital computers, the most common digital machines were adding machines. –Adding machines perform exactly one sort of operation. l Computers also perform one operation… but their operation is to accept a set of instructions that tell it how to do any sort of computation.

3 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Universal computing devices l Turing’s Thesis: Computer scientists believe that ANYTHING that can be computed, can be computed by a computer (provided that it has enough time and enough memory). l What does this imply? –All computers (from the least expensive to the most expensive) are capable of computing EXACTLY the same things IF they are given enough time and enough memory. –Some computers can do things faster, but none can do more than any other computer. –All computers can do exactly the same same things! l Thus, any given problem is either computable or it is not computable –Problems may be computable, but still not feasible (NPC)

4 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering How do we get the electrons to do the work? l We describe our problems in English or some other natural language. Computer problems are solved by electrons flowing around inside the computer. l It is necessary to transform our problem from a natural language to the voltages that influence the flow of electrons. l This transformation is really a sequence of systematic transformations, developed and improved over the last 50 years, which combine to give the computer the ability to carry out what may appear to be very complicated tasks. In reality, these tasks must be simple and straight-forward.

5 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering The principle of design abstraction l General model for Engineering (Byrne, 1992) Existing SystemTarget System Implementation Design Requirements Con- ceptual Con- ceptual Design Implementation re-think re-specify re-design re-build Alteration Reverse Engineering Abstraction Forward Engineering Refinement

6 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Levels of abstraction in digital computation l Design Process Algorithm & Language The Problem ISA & Microarchitecture Circuits & Devices Software level Hardware level Logic level Computer Science Computer Engineering Computer/Elect. Engineering

7 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering The statement of the problem l We describe problems that we wish to solve with a computer in a “natural language.” l Natural languages are fraught with a lot of things unacceptable for providing instructions to a computer. l The most important of these unacceptable attributes is ambiguity. To infer the meaning of a sentence, a listener is often helped by context that the computer does not have. l Example: “Time flies like an arrow.” –How fast time passes –Track meet –Gossip l A computer is an electronic idiot and can not deal with any ambiguity, thus… Algorithm & Language The Problem ISA & Microarchitecture Circuits & Devices

8 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering The algorithm l The first step in the sequence of transformations is to transform the natural language description of the problem to an algorithm. l An algorithm is a step-by-step procedure: –That transforms an input (possibly NULL) into some output (or output action) –That is guaranteed to terminate l Definiteness: Each step is precisely stated. l Effective computability: Each step must be something the computer can perform l Finiteness: The procedure must terminate l For any computable problem, there are an infinite number of algorithms to solve it. –Which solution is best? Algorithm & Language The Problem ISA & Microarchitecture Circuits & Devices

9 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering The programming language l The next step is to transform the algorithm into a computer program l Programming languages are unambiguous “mechanical” languages l There are two kinds of programming languages: –High-level languages are machine independent. They are “far above” the (underlying) computer –Low-level languages are machine dependent. They are tied to the computer on which the program will execute. There is generally only one such language per machine (referred to as its ASSEMBLY language). Algorithm & Language The Problem ISA & Microarchitecture Circuits & Devices

10 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering The instruction set architecture (ISA) l The next step is to translate the program into the instruction set of the particular computer that will be used to carry out the work of the program. l The Instruction Set Architecture (ISA) is the complete specification of the interface between programs that have been written and the underlying hardware that must carry out the work of those programs. –Examples: IA-32 (Intel, AMD, and others), PowerPC (Motorola) l Programs are translated from high languages in to the ISA of the computer on which they will be run by a program called a compiler (specific to the ISA). l Programs are translated from assembly to the ISA by an assembler l Analogy: A car –The car’s ISA describes what the driver sees/uses. Algorithm & Language The Problem ISA & Microarchitecture Circuits & Devices

11 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering The microarchitecture l The next step is to transform the ISA into an implementation. The detailed organization of an implementation is called its microarchitecture. –The IA-32 has been implemented by several different processors over the past twenty years 8086 (Intel, 1979), 8286, 8386, 8486, Pentium, PentiumII, Athlon, PentiumIII. –Each implementation is an opportunity for computer designers to make different trade-offs between cost and performance. [Computer design is always an exercise in trade-offs.] l Analogy: A car –The implementation of a car’s ISA is what goes on under the hood. Here all automobiles makes and models are different. Some with fuel injection, some have eight cylinders, some are turbocharged… in each case the “microarchitecture” of a specific automobile is the result of the automobile designers’ decisions regarding cost and performance. Algorithm & Language The Problem ISA & Microarchitecture Circuits & Devices

12 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering The logic circuit l The next step is to implement each element of the microprocessor out of simple logic circuits. l Here there are also choices, as the logic designer decides how to best make the trade- offs between cost and performance. l Even in the case of addition, there are several choices of logic circuits to perform this operation and differing speeds and corresponding costs. Algorithm & Language The Problem ISA & Microarchitecture Circuits & Devices

13 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering The devices l Finally, each basic logic circuit is implemented in accordance with the requirements of the particular device technology used. l So, CMOS circuits are different from NMOS circuits, which are different, in turn, from gallium arsenide circuits. Algorithm & Language The Problem ISA & Microarchitecture Circuits & Devices V in V out GND V cc RcRc RbRb

14 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Electronic aspects of digital design l V in low  I b = 0 –transistor cut off: V out = V cc l V in high  I b > 0 –transistor “on”: V out = GND V in V out GND V cc RcRc RbRb V IHmin V OLmax V in V OLmax V OHmin GND V cc V CESat V out Abnormal except for switching V OLmax : max output voltage in low state V OHmin : min output voltage in high state V ILmax : max input voltage recognized as low V IHmin : min input voltage recognized as high

15 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Digital devices l Analog characteristics –Continuous signal levels –Very small, smooth level changes l Digital characteristics –Discrete signal levels (voltage usually) –Two levels: on/off, high/low 1/0 (binary) –Disjoint or quantized level changes l Digital Concepts and Devices –Digital Design also called Logic Design –Logic Gates - the most basic digital devices –Digital devices have analog electronic aspect t v v t

16 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Basic logic circuits l AND gate –Output Z = 1 only when inputs A and B are both 1 l OR gate –Output Z = 1 only when inputs A or B or both are 1 l NOT gate or inverter –Output Z = 1 only when input A is 0 l Simple alone, but combine a few million gates and… A B Z A B Z ZA /A / B F

17 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Complex logic circuits l Logic circuits divide into two major types: l Combinational Logic –Current output depends on current input only –Examples: gates, decoders, multiplexors (MUXs), ALUs l Sequential Logic –Current output depends on past inputs as well as current input –Thus has a memory (usually called the state) –Examples: latches, flip-flops, state machines, counters, shift registers + * p m n p * (m + n) Design: avg (w,x,y,z) a^2+2ab+b^2

18 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering l STATE- A collection of state variables whose values at any one time contain all the information about the past values necessary to account for future behavior. l Example: A TV tuner could have a current channel stored internally, so the next channel can be predicted as a function of the inputs, i.e. the UP button increases the channel by one, the DOWN button decreases the channel by one. What is the state of this TV tuner? l Digital sequential logic –State variables are binary values –Circuit with n binary state variables has 2 n possible states –Also known as a finite state machine (FSM). –Changes usually synchronized with a system clock Sequential logic definitions

19 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Bistable Element l The simplest possible feedback sequential logic circuit is shown below: l It is bistable because it has two stable states: –State 1: If Q (Q=V out1 =V in2 ) is high, the bottom inverter output (/Q =V out2 =V in1 ) is low, which keeps the top inverter output Q high. –State 2: If Q is low, the bottom inverter output /Q is high, which keeps the top inverter output Q low. V in1 V in2 V out1 V out2 Q /Q

20 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering S-R Latch SRQ/Q Last Q Last /Q 1 0 S R Q /Q S R Q Q Schematic Symbol Hold Reset Set ILLEGAL Function Table Set Reset Characteristic Equation: Q(t+1) = S + R’Q(t)

21 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Clocked Synchronous State-machine Structure Clocked Synchronous State-machine Structure Next-state Logic F State Memory clock Output Logic G excitation inputs clock current stateoutputs (Mealy machine) R

22 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Random Access Memory (RAM) l A circuit with n + b inputs and b outputs: 2 n x b RAM Address nb Data outputs Memory  values determined by user Volatile  contents lost without power Uniform (Random) Access  delay is uniform for all addresses b/b/ Data inputs Write Enable

23 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Instruction Format: Opcode [15:12], Op A [11:8], Op B [7:4], Op C [3:0] Example Instruction: x2021 Opcode 2 Format: M[A]  M[B] Instruction: M[0]  M[2]  -processor Instruction Start Reset Clock > RAM Ready Address Data In Write Data Out Address Out Data Out Write Enable Data In Ram Contents (Before) ADDRDATA x0x4 x1xF x2x9 …... Ram Contents (After) ADDRDATA x0x9 x1xF x2x9 …... A simple microprocessor

24 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering  -processor Instruction Start Reset Clock Ready 16 Address Out Data Out Write Enable Data In Control Unit Data Unit VNCZ Constant Control Word > > Example Instruction: x2021 Opcode 2 Format: M[A]  M[B] Instruction: M[0]  M[2] R0  Constant B Address Out  R0, R1  Data In R0  Constant A Address Out  R0, Data Out  R1, Write Enable Return to IDLE state (Sequencing Instruction) A simple microarchitecture

25 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Instruction Start Reset Clock Ready 16 Write Enable VNCZ Constant Control Word Operand Select > CLR CAR DATALD/CNT’ Generate Data Signal Logic Generate Load Signal Logic CONTROL STORE (ROM) Generate Ready Mode Condition Code Next Address Operand Select AddressData microinstruction ?? 12:0 16:13 A simple microarchitecture R0  Constant B Address Out  R0, R1  Data In R0  Constant A Address Out  R0, Data Out  R1, Write Enable CAR  x00 (IDLE STATE)

26 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering A simple microprocessor l Central Processing Unit –Control Unit, Integer Datapath (Load/Store, Integer ALU) l Floating Point Unit –Floating Point Datapath l Internal Cache –SRAM for Instruction Cache (i-cache) and Data Cache (d-cache) l Memory Management Unit –Controls communication with Main Memory and other I/O FPU CPU Internal Cache MMU Bus

27 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering A simple computer architecture l Generic Computer System. –Current architectures are performance driven, and vary widely. l Processor –Uniprocessor systems l ASIC (Application Specific Integrated Circuit) –Performs a specific task, not a general purpose processor (e.g. Voodoo) l I/O Device –Accesses data devices (e.g. Graphics Adapter, Disk Controller, et al.) Processor Memory ASIC I/O Device ASIC I/O Device Bus

28 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering A contemporary architecture Front Side Bus 100 MHz? Microprocessors Memory Chipset Bridge Back Side Bus PCI - 33MHz Main Memory Graphics Adapter (non-AGP) AGP External Cache Disk Interface (EIDE,uSCSI-2) Network Interface Card (NIC) Serial/Parallel I/O (keyboard, mouse, printer) ISA devicesCompatibility Bridge (South-side, ISA) Registers 2ns L1 On-chip 4ns L2 On-chip 5ns L3 Off-chip 30ns Memory 220ns Paged VM > 1 ms!

29 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering The instruction set l High-Level Language - C l A = B + C; –Memory-Transfer Equivalent l Mem[A]  Mem[B] + Mem[C] l Mem[EA00]  Mem[EA08] + Mem[EA10] l Machine-Level Equivalent –Assembly (human readable)ex: Machine (for a simple architecture) l Load R2, BE2EA08 l Load R3, C E3EA10 l R2  R2 + R30223 l Store A, R2F2EA00 l The bits of a machine instruction are divided into fields –eg: E2EA08 –E: Operation “Load”; 2: Destination Address R2; EA08: Address Field –The operation field (opcode) defines the format for the instruction

30 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering The instruction set l There are three basic types of computer instructions –Register Instructions: operate on values stored in registers l Arithmetic, Shift, and Logic instructions –Move Instructions: move data between memory and registers l Load/Store instructions l Move/Copy portions of memory –Branch Instructions: select one of two possible next instructions to execute l Branch on condition, Unconditional branch (Jump) l Only one address is explicit, the other operand is implict –e.g.: Beq R2, R3, A –If the contents of R2 = R3 then execute the instruction at location A next (explict) –otherwise, execute the next instruction in the normal order (using the PC) (implict)

31 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering The Von Neumann architecture l The Von Neumann model of computer processing –Program and data are both stored as sequences of bits in the computer’s memory. –The program in executed on instruction at a time under the direction of the control unit. l The instruction-execution cycle –Instruction Fetch (IF) stage l Get next instruction from the memory address referenced by the PC l Place the new instruction in the Instruction Register l Increment the PC to the next instruction address –Execute operation (EX) stage l Execute the operation specified in the opcode –Branch instructions may update the PC –Repeat

32 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering How do we specify the program? l Contemporary languages –C, C++, Perl, Java, and hundreds more. l Languages of Yore –Fortran, COBOL, and scores more. l Specialty languages –VHDL, simulation languages, and thousands more. l There are over 1,000 “standardized” programming languages today. l The only goal of these languages is to help humans implement their algorithms in the instructions available for a particular ISA

33 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering How do we execute the program? HARDWARE CPU Memory I/O Devices APPLICATION PROGRAMS Compilers Databases Games Productivity Tools USERSUSERS How do we use the resources? OS Limited Resources Many Demands SOFTWARE

34 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering What is an Operating System? l Do we want all programs to have access to all instructions? l The OS is a program that acts as an intermediary between the application programs and the hardware resources –All communication requires hardware resources, thus the OS is also an intermediary between users and applications l The purpose of any OS is to provide an environment in which: –users can (conveniently) execute programs and access data –application programs can (efficiently and fairly) access system resources (processor time, memory, file space, I/O devices, etc.) l The OS need not perform any other useful function: it is a control environment (kernel) controls access to all resources –All other software is an application program –How does the existence of an OS simplify coding an app? –Do you trust others to protect your rights and data?

35 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering The algorithm l Developing an algorithm to solve a problem is non-trivial l As with many issues in engineering, there are trade-offs to be made between performance (the correctness of the solution) and cost (the time it takes for the algorithm to complete. l Consider the Traveling salesman problem: –You must visit, by car, n different cities. From each city, you can get to any other city – but the distances between them vary. –Your “Problem” is to find the shortest route that visits every city exactly once.

36 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Exponential growth l 10^1 l 10^2 l 10^3Number of students in the college of engineering l 10^4 Number of students enrolled at Wright State University l 10^6 Number of people in Dayton l 10^8 Number of people in Ohio l 10^10 Number of stars in the galaxy l 10^20 Total number of all stars in the universe l 10^80 Total number of particles in the universe l 10^100 << Number of possible solutions to traveling salesman (100) l Travelling saleman (100) is computable but it is NOT feasible.

37 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Optimization algorithms l The knapsack problem –You stumble across some valuable artifacts while out in the wild. Unfortunately, you can only add ten lbs to your pack and still make it back to civilization. –What do you take? ItemValueWeight$/lb A $15010 lbs.15 B $1407 lbs.14 C $1005 lbs.10 D $603 lbs.20 E$453 lbs.15

38 Wright State University, College of Engineering Dr. T. Doom, Computer Science & Engineering EGR 191 Intro. to Engineering Bug brain demo l Your laboratory assignment this week is to gain some familiarity with the concept of solving relatively complex problems with very simple primitives.