ALICE Si-FMD,T0,V0 26/ Jens Jørgen Gaardhøje, NBI, Si-FMD oUpdate on Status oConceptual design of FEE and BEE-DAQ chain oTimetable oHeat dissipation

ALICE Si-FMD,T0,V0 26/ Jens Jørgen Gaardhøje, NBI, Hybrid with Viking PA chips VA preamp+shaper: 128 ch Connector(s) for power, control, read-out Other components Hybrid cards contain:  FE–Preampl. chips  Bias voltages distribution  Gate/strobe distribution  Read-out clock distribution  Detector bias connection Si detector

ALICE Si-FMD,T0,V0 26/ Jens Jørgen Gaardhøje, NBI, FMD RO strategy FMD Segment ON DETECTOR Digital serial links (15-20 m) Digital serial links (15-20 m) Trigger & Slow Ctrl IN CAVERN IN COUNTING ROOM Slow control & Trigger Slow control & Trigger Detector Data Link (50-60 m) Detector Data Link (50-60 m) FMD RCU VA 1 ring: 10/20 segments 2 Digitizers 1 RCU per side 1 DDL per side Full FMD: 70 segments 10 Digitizers 2 RCU’s 2 DDL’s FMD Read-Out and Control Electronics Analog serial link (10 MHz)  0.5 m Analog serial link (10 MHz)  0.5 m VA read-out control VA read-out control Local Controller DDL - INT Slow-Control Interface TTC-RX BOARD CTRL Data receiver FMD Digitizer ALTRO CTRL Read-out CTRL CTRL BSN, 21 Nov 2002

ALICE Si-FMD,T0,V0 26/ Jens Jørgen Gaardhøje, NBI, FMD FEE test setup BSN, 21 Nov 2002 FMD FEE test CTRL Power Biases Power Biases Clock 10 MHz Clock 10 MHz Trig in ALTRO tester ALTRO CTRL Ext clock Ext trigger Si detector VA Labview DAQ

ALICE Si-FMD,T0,V0 26/ Jens Jørgen Gaardhøje, NBI, Si-FMD timetable (1) AFRONT END (FE) READ OUT ELECTRONICSCompleted 1Demonstrate functionality of conceptual layout of FEE (Viking PA chip, control system, interface to ALTRO test board) April Final choice of VA pre-ampl. chip. RO testJune 1, Test FEE system coupled to sample Si detector. Source and electron beam tests. June 1, Design, construction and test of prototype FMD digitizer card (FMDD), RO test with ’mini’ FMD-RCU October 1, Full Si detector element + electronics chain RO with realistic RCU and DDL link to DAQ. June 1, 2004 BMECHANICS AND INTEGRATIONCompleted 1Full scale model manufactured (Si1)February 1, Cabling and Cooling issues resolvedApril 1, Full integration sequence decidedJune 1, 2003

ALICE Si-FMD,T0,V0 26/ Jens Jørgen Gaardhøje, NBI, Si-FMD timetable (2) C.SILICON DETECTORCompleted by 1Complete market surveyFebruary 1, Define final specsMarch 1, Place order for prototype with industryApril 1, Delivery Si-wafer prototypeJune 1, Start production of Si-hybrid FEE cardJune 1, Delivery prototype hybridAugust 1, Si prototype test with FEE and BEE test RO setupDecember 1, Place final order for Si with industryApril1, 2004

ALICE Si-FMD,T0,V0 26/ Jens Jørgen Gaardhøje, NBI, FMD Material constants (1) Material type and thickness of one Si detector ring: LayerMaterialThickness Heat conductivit y (W/m·K) Density (kg/m 3 ) Specific heat (J/kg  K) Silicon detector Si0.3 mm Hybrid Al 2 O mm FE electronics air + chips 10 mm (mostly air) Support Carbon fibre or aluminium honeycomb 2  0.5 mm C or Al + 10 mm air C: 24 Al: 222 C: 2200 Al: 2700 C: 691 Al: 900

ALICE Si-FMD,T0,V0 26/ Jens Jørgen Gaardhøje, NBI, FMD Material constants (2) Material type and thickness of one Si detector ring: LayerMaterialThickness Interaction length Radiation length Silicon detector Si0.3 mm0.6 · · Hybrid Al 2 O mm2.0 · · FE electronics air + chips 10 mm (mostly air) Support Carbon fibre or aluminium honeycomb 2  0.5 mm C or Al + 10 mm air C: 2.6 · Al: 2.5 · C: 0.5 · Al: 1.1 · Total thickness of one Si ring: C: 5.2 · I 1.8 · X 0 Al: 5.1 · I 2.4 · X 0

ALICE Si-FMD,T0,V0 26/ Jens Jørgen Gaardhøje, NBI, Heat dissipation. Si-FMD Heat dissipated by FE electronics of one Si detector ring: VA1TA preamp chip (128 channels): 150 mW  80 chips = 12 W / ring For simulation: assume uniform distribution on hybrid surface (towards support plate) Read-out electronics and power distribution:  5 W / ring For simulation: assume concentrated in 2 locations near outer radius => Total estimated heat release pr. side < W

ALICE Si-FMD,T0,V0 26/ Jens Jørgen Gaardhøje, NBI, FMD electronics FMD channel count Note: We are looking into increasing the number of strips, but use more integrated FE chips - red values. Segments (wafers) Phi sectors Radial sectors Hybrids Chips/ hybrid FE chipsFE channels Si1 inner1020(256) 51210(16) 8(160) 80(5,120) 10,240 Si1 outer2040(128) 25620(8) 4(160) 80(5,120) 10,240 Si2 inner1020(256) 51210(16) 8(160) 80(5,120) 10,240 Si2 outer2040(128) 25620(8) 4(160) 80(5,120) 10,240 Si31020(256) 51210(16) 8(160) 80(5,120) 10,240 Total system (720) 360(25,600) 51,200

ALICE Si-FMD,T0,V0 26/ Jens Jørgen Gaardhøje, NBI, FWD detectors