Data Representation By- Mr. S. S. Hire. Data Representation.

Slides:



Advertisements
Similar presentations
Chapter 8: Central Processing Unit
Advertisements

1/1/ / faculty of Electrical Engineering eindhoven university of technology Introduction Part 2: Data types and addressing modes dr.ir. A.C. Verschueren.
Fixed Point Numbers The binary integer arithmetic you are used to is known by the more general term of Fixed Point arithmetic. Fixed Point means that we.
Tuan Tran. What is CISC? CISC stands for Complex Instruction Set Computer. CISC are chips that are easy to program and which make efficient use of memory.
Processor Technology and Architecture
Chapter XI Reduced Instruction Set Computing (RISC) CS 147 Li-Chuan Fang.
RISC By Don Nichols. Contents Introduction History Problems with CISC RISC Philosophy Early RISC Modern RISC.
Chapter 4 Processor Technology and Architecture. Chapter goals Describe CPU instruction and execution cycles Explain how primitive CPU instructions are.
State Machines Timing Computer Bus Computer Performance Instruction Set Architectures RISC / CISC Machines.
11/11/05ELEC CISC (Complex Instruction Set Computer) Veeraraghavan Ramamurthy ELEC 6200 Computer Architecture and Design Fall 2005.
Unit -II CPU Organization By- Mr. S. S. Hire. CPU organization.
(6.1) Central Processing Unit Architecture  Architecture overview  Machine organization – von Neumann  Speeding up CPU operations – multiple registers.
Group 5 Alain J. Percial Paula A. Ortiz Francis X. Ruiz.
The Pentium: A CISC Architecture Shalvin Maharaj CS Umesh Maharaj:
RISC and CISC by Eugene Clewlow. Overview History of CISC and RISC CISC and RISC  Philosophy  Attributes and disadvantages Summation.
Reduced Instruction Set Computers (RISC) Computer Organization and Architecture.
Cisc Complex Instruction Set Computing By Christopher Wong 1.
Processor Organization and Architecture
RISC and CISC. Dec. 2008/Dec. and RISC versus CISC The world of microprocessors and CPUs can be divided into two parts:
CH13 Reduced Instruction Set Computers {Make hardware Simpler, but quicker} Key features  Large number of general purpose registers  Use of compiler.
Computer Arithmetic Nizamettin AYDIN
Computer Arithmetic. Instruction Formats Layout of bits in an instruction Includes opcode Includes (implicit or explicit) operand(s) Usually more than.
Chun Chiu. Overview What is RISC? Characteristics of RISC What is CISC? Why using RISC? RISC Vs. CISC RISC Pipelines Advantage of RISC / disadvantage.
Computing Systems Basic arithmetic for computers.
Previously Fetch execute cycle Pipelining and others forms of parallelism Basic architecture This week we going to consider further some of the principles.
Floating Point. Agenda  History  Basic Terms  General representation of floating point  Constructing a simple floating point representation  Floating.
What have mr aldred’s dirty clothes got to do with the cpu
RISC By Ryan Aldana. Agenda Brief Overview of RISC and CISC Features of RISC Instruction Pipeline Register Windowing and renaming Data Conflicts Branch.
Ramesh.B ELEC 6200 Computer Architecture & Design Fall /29/20081Computer Architecture & Design.
Chapter 8 CPU and Memory: Design, Implementation, and Enhancement The Architecture of Computer Hardware and Systems Software: An Information Technology.
COMP201 Computer Systems Floating Point Numbers. Floating Point Numbers  Representations considered so far have a limited range dependent on the number.
Chapter Six Sun SPARC Architecture. SPARC Processor The name SPARC stands for Scalable Processor Architecture SPARC architecture follows the RISC design.
RISC and CISC. What is CISC? CISC is an acronym for Complex Instruction Set Computer and are chips that are easy to program and which make efficient use.
COMPUTER ORGANIZATION AND ASSEMBLY LANGUAGE Lecture 19 & 20 Instruction Formats PDP-8,PDP-10,PDP-11 & VAX Course Instructor: Engr. Aisha Danish.
MIPS Processor Chapter 12 S. Dandamudi To be used with S. Dandamudi, “Introduction to Assembly Language Programming,” Second Edition, Springer,
 Introduction to SUN SPARC  What is CISC?  History: CISC  Advantages of CISC  Disadvantages of CISC  RISC vs CISC  Features of SUN SPARC  Architecture.
ECEG-3202 Computer Architecture and Organization Chapter 7 Reduced Instruction Set Computers.
CISC and RISC 12/25/ What is CISC? acronym for Complex Instruction Set Computer Chips that are easy to program and which make efficient use of memory.
EECS 322 March 18, 2000 RISC - Reduced Instruction Set Computer Reduced Instruction Set Computer  By reducing the number of instructions that a processor.
RISC / CISC Architecture by Derek Ng. Overview CISC Architecture RISC Architecture  Pipelining RISC vs CISC.
CISC. What is it?  CISC - Complex Instruction Set Computer  CISC is a design philosophy that:  1) uses microcode instruction sets  2) uses larger.
Addressing modes, memory architecture, interrupt and exception handling, and external I/O. An ISA includes a specification of the set of opcodes (machine.
Answer CHAPTER FOUR.
1 CE 454 Computer Architecture Lecture 4 Ahmed Ezzat The Digital Logic, Ch-3.1.
William Stallings Computer Organization and Architecture 8th Edition
Topics to be covered Instruction Execution Characteristics
RISC and CISC Lecture 8.
Visit for more Learning Resources
Central Processing Unit Architecture
A Closer Look at Instruction Set Architectures
Overview Introduction General Register Organization Stack Organization
CISC (Complex Instruction Set Computer)
Central Processing Unit
CISC AND RISC SYSTEM Based on instruction set, we broadly classify Computer/microprocessor/microcontroller into CISC and RISC. CISC SYSTEM: COMPLEX INSTRUCTION.
EE 445S Real-Time Digital Signal Processing Lab Spring 2014
RISC and CISC.
How to represent real numbers
Computer Arithmetic Multiplication, Floating Point
ECEG-3202 Computer Architecture and Organization
Introduction to Microprocessor Programming
Chapter 12 Pipelining and RISC
Arithmetic Logic Unit A.R. Hurson Electrical and Computer Engineering Missouri University of Science & Technology A.R. Hurson.
Presentation transcript:

Data Representation By- Mr. S. S. Hire

Data Representation

Selection Criteria  In selecting a number representation to be used in a computer, the following factors should be taken into account. 1.The number types to be represented. 2.The range of values(number magnitudes) likely to be encountered. precision 3.The precision of the numbers, which refers to the maximum accuracy of the representation. 4.The cost of the hardware required to store and process the numbers.

Scalar Data Types 1.Fixed point numbers: - - Fixed point numbers come in lengths of 1,2,4 or more bytes. - Fixed point formats allow a limited range of values. - Require relatively simple hardware. - Fixed point numbers are represented in two forms: 1.Unsigned integer. (represents +ve integers) 2.Signed integer.

Fixed Point Numbers Signed Integers: - Signed Integers: - Techniques to represent signed integer numbers are: - 1.Sign-magnitude representation. 2.1’s complement. 3.2’s complement.

Why 2’s complement 1.The addition of 1’s complement numbers is complicated by the fact that a carry bit from the most significant magnitude bit x n-2 must be added to the least significant bit position x 0. 2.Unique representation for Zero (0).

Floating point Numbers Scientific Notation permits us to represent such numbers using relatively few digits. Floating point numbers allow a much larger range of values Require either costly processing hardware or lengthy software implementation It is used in scientific computations. Three numbers are associated with a floating point number- 1)A mantissa M 2)An exponent E 3)And a base B i.e. M*B E

32 bit (Single Precision) representation Sign – 1 bit Exponent -8 bits Mantissa – 23 bits

32 bit (Single Precision) representation Instead of signed Exponent – the value actually stored in the exponent field is E’ = E(Scaling factor) + bias In 32 bit Bias is and 255 end values of E’ used to indicate the floating point values of exact zero and infinity respectively. 0 < E’< 255 E range is -126 <= E <=127

64 bit - Double Precision representation

It occupies two 32 bit words. The 64 bits are divided into 3 fields – Sign – 1 bit Exponent – 11 bits Mantissa – 52 bits E’= E where bias = 1023 E’ = 0 < E’ < 2047 E range <= E <= 1023

Booth’s Algorithm Booth algorithm. A technique that works equally well for both negative and positive multipliers called the Booth algorithm. The Booth algorithm generates a 2n-bit product. It treats both positive and negative 2’s complement n-bit operands uniformly. It has 3 attractive features: 1.It handles both positive and negative multipliers uniformly. 2.It achieves some efficiency in the number of additions required when the multiplier has a few large blocks of 1s. 3.On average, the speed of doing multiplication with the Booth algorithm is the same as with the normal algorithm.

Booth’s Algorithm : Flowchart

Booth’s Algorithm 1.Load AC=0, Q -1 = 0, M=Multiplicand, Q=Multiplier, Count=n. 2.Check the status of Q 0 Q -1 if Q 0 Q -1 =10 perform AC = AC – M if Q 0 Q -1 =01 perform AC = AC + M 3.Perform Arithmetic shift right: AC, Q, Q -1 4.Decrement sequence counter if not zero, repeat step 2 through 4. 5.The final result will appear in AC and Q registers. 6.Stop.

CPU organization

Additional Features  Most recent CPUs contain following extensions which improves their performance and ease of programming. 1.Multipurpose register set for storing data and addresses. AC, DR, AR are replaced by register file which is multipurpose. 2. Additional data, instruction and address types. supports several different word sizes and formats. Call and return instructions are added which simplifies program design.

Additional Features 3.Status Register- - Register to indicate computation status. - Indicates infrequent or exceptional conditions. - Also indicates the user and supervisor states. - Conditional branch instructions test the status register. 4.Program control stack. - SP keeps track of the stack’s entry point. - A part external memory is used as push-down stack memory.

Pipelining Speed up Techniques, instruction level parallelism Parallelism may be present in DPU, overlapping carried out by DPU or PCU

RISC PROCESSORS RISC? RISC, or Reduced Instruction Set Computer. is a type of microprocessor architecture that utilizes a small, highly-optimized set of instructions, rather than a more specialized set of instructions often found in other types of architectures. History The first RISC projects came from IBM, Stanford, and UC-Berkeley in the late 70s and early 80s. The IBM 801, Stanford MIPS, and Berkeley RISC 1 and 2 were all designed with a similar philosophy which has become known as RISC. Certain design features have been characteristic of most RISC processors: – one cycle execution time: RISC processors have a CPI (clock per instruction) of one cycle. This is due to the optimization of each instruction on the CPU and a technique called PIPELINING – pipelining: a techique that allows for simultaneous execution of parts, or stages, of instructions to more efficiently process instructions; – large number of registers: the RISC design philosophy generally incorporates a larger number of registers to prevent in large amounts of interactions with memory

RISC Attributes Extensive instructions. Complex and efficient machine instructions. Microencoding of the machine instructions. Extensive addressing capabilities for memory operations. Relatively few registers. In comparison, RISC processors are more or less the opposite of the above: Reduced instruction set. Less complex, simple instructions. Hardwired control unit and machine instructions. Few addressing schemes for memory operands with only two basic instructions, LOAD and STORE Many symmetric registers which are organised into a register file.

RISC Disadvantages There is still considerable controversy among experts about the ultimate value of RISC architectures. Its proponents argue that RISC machines are both cheaper and faster, and are therefore the machines of the future. However, by making the hardware simpler, RISC architectures put a greater burden on the software. Is this worth the trouble because conventional microprocessors are becoming increasingly fast and cheap anyway?

What is CISC? CISC is an acronym for Complex Instruction Set Computer and are chips that are easy to program and which make efficient use of memory. Since the earliest machines were programmed in assembly language and memory was slow and expensive, the CISC philosophy made sense, and was commonly implemented in such large computers as the PDP-11 and the DECsystem 10 and 20 machines. Most common microprocessor designs such as the Intel 80x86 and Motorola 68K series followed the CISC philosophy. But recent changes in software and hardware technology have forced a re-examination of CISC and many modern CISC processors are hybrids, implementing many RISC principles.

CISC Attributes The design constraints that led to the development of CISC (small amounts of slow memory and fact that most early machines were programmed in assembly language) give CISC instructions sets some common characteristics: Variable length instructions where the length often varies according to the addressing mode Instructions which require multiple clock cycles to execute. E.g. Pentium is considered a modern CISC processor