A Lecture on Computer Architecture For Readers

2 프로그래머입장에서 바라본 컴퓨터 구조와 보호 모드 컴퓨터 구조에 대한 이해 ; 자신이 작성한 프로그램이 어떻게 수행될지 좀더 세밀하게 이해하기 위해서는 컴퓨터 구조에 대한 이해가 필수적이다. 정 덕 영 Software Design & Developer

3 Agenda First Computer  ENIAC  von Neumann 80xx Protected Mode  Descriptor  PDE, PTE  IDT (Interrupt Descriptor Table)  I/O Privilege Organization  Pipe Line  Super scalar  Cache  Hyper Threading Procedure & Stack  Stack  Stack Frame  Calling Conventions  Stack Back Tracing

4 First computer

5 ENIAC - background Electronic Numerical Integrator And Computer University of Pennsylvania Started 1943 Finished 1946  Too late for war effort Used until 1955 Programmed manually by switches (hard wired) 18,000 vacuum tubes 30 tons 15,000 square feet 140 kW power consumption 5,000 additions per second

6 von Neumann Stored Program concept Main memory storing programs and data ALU operating on binary data Control unit interpreting instructions from memory and executing Input and output equipment operated by control unit Princeton Institute for Advanced Studies  IAS Completed 1952

7 Structure of von Neumann machine

8 Structure of ISA (Instruction Set Architecture) 1000 x 40 bit words  Binary number  2 x 20 bit instructions Set of registers (storage in CPU)  Memory Buffer Register  Memory Address Register  Instruction Register  Instruction Buffer Register  Program Counter  Accumulator  Multiplier Quotient

9 80xx

Registers

11 8bit, 16bit

Registers

13 Protected Mode

14 Protected Mode

15 Protected Mode – Memory Access

16 Protected Mode – Descriptor Table

17 Protected Mode – Descriptor

18 Protected Mode – updating segment 데이터 세그먼트 갱신 (DS, ES, FS, GS) 스택 세그먼트 갱신 (SS)

19 Protected Mode – call gate 코드 세그먼트 갱신 (CS)

20 Protected Mode – Jump Kernel using Interupt

21 Protected Mode – Paging

22 Protected Mode – Paging

23 Protected Mode – PDE, PTE

24 Protected Mode – I/O Privilege

25 Protected Mode – IDT (Interrupt Descriptor Table)

26 Exception, Interrupt (Intel)

27 Page Fault Handler

28 Organization

– Pipe Line

30 Pentium – Super scalar

31 Cache - Direct mapping

32 Cache - Associative mapping

33 Cache - Set Associative mapping

34 Pentium’s cache

35 Pentium 4(xeon) – Hyper Threading Processor 2 Processor 1

36 Procedure & Stack

37 Stack

38 Stack Frame

39 Calling Conventions __cdecl __stdcall

40 Stack Back Tracing

41 Question And Answer

42 GOOD BYE