1 John Brown Art Kay Tim Green Tina-TI SynthesizeTina-ize The Four Musketeers of HPL AnalyzeRecognize High Current V-I Circuits

2 V-I Circuit “Recognize” Objectives  Potential Applications, End Equipment, Markets  Circuit Topologies  Circuit Stability Issues  Power Dissipation Issues  Transient Protection Issues  PCB Issues  Semiconductor Overstress Issues

3 V-I Circuit “Analyze, Synthesize, Tina-ize ” Objectives  Provide Synthesis Techniques for Common Topologies  Provide Tools to Simplify Stability Analysis  Provide Analysis Techniques for Power Dissipation  Provide Solutions for Common Transient Problems  Provide Tips for PCB Layouts  Provide Tricks for Tina-TI Analysis

4 Power Amplifiers Strategy for Markets 1. High Volume Growth Communications Optical Networking ONET (TECs, Laser Diode Pumps, Avalanche Photodiode Bias HV) DLP Digital Light Projectors (high voltage OPA) Industrial Electromechanical (OPA, PWM) Automotive Electromechanical (OPA, PWM) 2. Gen Std Catalog Products Steady Growth Industrial, Medical, Lab, ATE, Some Audio, Consumer High Speed Buffers, High Voltage, High Current OPAs

5 Power Amplifiers Applications in Markets 1. Test, Particularly Automated ATE Analog Pin Driver, Power V & I Excitation 2. Power Line Communication High Pulse Current Drive Through Transformer or Capacitor Coupled ac Power Line (Residential & Commercial) 3. Displays High Current Driver for Dithering Projected Light Beam, High Voltage for Ink Jet Printers 4. Industrial, Medical, Scientific, Analytical, and Laboratory TEC Drivers, Electromechanical Linear Valve/Positioner Drivers, Motors, Power Supplies 5. Optical Networking / Gen Laser Systems TEC Drivers (Thermo-electric Coolers), Laser Pumps 6. Some Audio Headphone and Speaker Drivers 7. Some Automotive Power Steering Pumps, Window Motors COMPETITION 1. Mostly Discrete 2. National Semiconductor, ST, Maxim, Allegro, ON-SEMI, International Rectifier, Infineon, Toshiba

6 Review - Essential Principles  Poles, Zeros, Bode Plots  Op Amp Loop Gain Model  Loop Gain Test  β and 1/β  Rate-of-Closure Stability Criteria  Loop Gain Rules-of-Thumb for Stability  R O and R OUT

7 Commercial Break (Shameless Self-Promotion) See 15 Part Series: “Operational Amplifier Stability”

8 Poles and Bode Plots  Pole Location = f P  Magnitude = -20dB/Decade Slope  Slope begins at f P and continues down as frequency increases  Actual Function = -3dB f P  Phase = -45°/Decade Slope through f P  Decade Above f P Phase = -90°  Decade Below f P Phase = 0°  A(dB) = 20Log 10 (V OUT /V IN )

9 Zeros and Bode Plots  Zero Location = f Z  Magnitude = +20dB/Decade Slope  Slope begins at f Z and continues up as frequency increases  Actual Function = +3dB f Z  Phase = +45°/Decade Slope through f Z  Decade Above f Z Phase = +90°  Decade Below f Z Phase = 0°  A(dB) = 20Log10(VOUT/VIN)

10 Op Amp: Intuitive Model

11 Op Amp Loop Gain Model V OUT /V IN = Acl = Aol/(1+Aolβ) If Aol >> 1 then Acl ≈ 1/β Aol: Open Loop Gain β: Feedback Factor Acl: Closed Loop Gain 1/  = Small Signal AC Gain  = feedback attenuation

12 Stability Criteria

13 Traditional Loop Gain Test Op Amp Loop Gain Model Op Amp is “Closed Loop” SPICE Loop Gain Test: Break the Closed Loop at V OUT Ground V IN Inject AC Source, V X, into V OUT Aolβ = V Y /V X

14 β and 1/β β is easy to calculate as feedback network around the Op Amp 1/β is reciprocal of β Easy Rules-Of-Thumb and Tricks to Plot 1/β on Op Amp Aol Curve

15 Plot (in dB) 1/β on Op Amp Aol (in dB) Aolβ = Aol(dB) – 1/β(dB) Note how Aolβ changes with frequency Proof (using log functions): 20Log 10 [Aolβ] = 20Log 10 (Aol) - 20Log 10 (1/β) = 20Log 10 [Aol/(1/β)] = 20Log 10 [Aolβ] Loop Gain Using Aol & 1/β

16 Stability Criteria using 1/β & Aol At fcl: Loop Gain (Aol  ) = 1 fcl = (Aol slope – 1/β slope) *20dB/decade fcl = STABLE **40dB/decade fcl = UNSTABLE

17 Loop Gain Bandwidth Rule: 45 degrees for f < fcl Aolβ (Loop Gain) Phase Plot Loop Stability Criteria: <-180 degree phase shift at fcl Design for: <-135 degree phase shift at all frequencies <fcl Why?: Because Aol is not always “Typical” Power-up, Power-down, Power-transient  Undefined “Typical” Aol Allows for phase shift due to real world Layout & Component Parasitics

18 Poles & Zeros Transfer: (1/β, Aol) to Aolβ Aol & 1/β PlotLoop Gain Plot (Aolβ) To Plot Aolβ from Aol & 1/β Plot: Poles in Aol curve are poles in Aolβ (Loop Gain)Plot Zeros in Aol curve are zeros in Aolβ (Loop Gain) Plot Poles in 1/β curve are zeros in Aolβ (Loop Gain) Plot Zeros in 1/β curve are poles in Aolβ (Loop Gain) Plot [Remember: β is the reciprocal of 1/β]

19 Frequency Decade Rules for Loop Gain Loop Gain View: Poles: fp1, fp2, fz1; Zero: fp3 Rules of Thumb for Good Loop Stability:  Place fp3 within a decade of fz1 fp1 and fz1 = -135° phase shift at fz1 fp3 < decade will keep phase from dipping further  Place fp3 at least a decade below fcl Allows Aol curve to shift to the left by one decade

20 Op Amp Model for Derivation of R OUT From: Frederiksen, Thomas M. Intuitive Operational Amplifiers. McGraw-Hill Book Company. New York. Revised Edition R OUT = R O / (1+Aolβ)

21 Op Amp Model for Loop Stability Analysis  R O is constant over the Op Amp’s bandwidth  R O is defined as the Op Amp’s Open Loop Output Resistance  R O is measured at I OUT = 0 Amps, f = 1MHz (use the unloaded R O for Loop Stability calculations since it will be the largest value  worst case for Loop Stability analysis)  R O is included when calculating  for Loop Stability analysis

22 R O & Op Amp Output Operation  Bipolar Power Op Amps  CMOS Power Op Amps  Light Load vs Heavy Load

23 R O Measure w/DC Operating Point: I OUT = 0mA

24 R O Measure w/DC Operating Point: I OUT = 0mA R O = VOA / AM1 R O = 9.61mVrms / μArms R O = Ω

25 R O Measure w/DC Operating Point I OUT = 4.45mA Sink

26 R O Measure w/DC Operating Point I OUT = 4.45mA Sink R O = VOA / AM1 R O = 3.45Vrms / µArms R O = 4.885Ω

27 R O Measure w/DC Operating Point I OUT = 5.61mA Source

28 R O Measure w/DC Operating Point I OUT = 5.61mA Source R O = VOA / AM1 R O = 3.29mVrms / μArms R O = 4.693Ω

29 R O Measure w/DC Operating Point I OUT = 2.74A Source

30 R O Measure w/DC Operating Point I OUT = 2.74A Source R O = VOA / AM1 R O = uVrms / 550.1μArms R O = 0.571Ω

31 R O Measure w/DC Operating Point I OUT = 2.2A Sink

32 R O Measure w/DC Operating Point I OUT = 2.2A Sink R O = VOA / AM1 R O = uVrms / μArms R O = 0.267Ω

33 R O Measure w/DC Operating Point I OUT = 0A

34 R O Measure w/DC Operating Point I OUT = 0A R O = VOA / AM1 R O = 4.42mVrms / μArms R O = 6.29Ω

35 R O Measure w/DC Operating Point I OUT = 1A Sink

36 R O Measure w/DC Operating Point I OUT = 1A Sink R O = VOA / AM1 R O = μVrms / μArms R O = 0.309Ω

37 R O Measure w/DC Operating Point I OUT = 1A Source

38 R O Measure w/DC Operating Point I OUT = 1A Source R O = VOA / AM1 R O = μVrms / μArms R O = 0.308Ω

39 Non-Inverting Floating Load V-I  Basic Topology  Stability Analysis (w/effects of Ro) 1/  & Aol Test Loop Gain Test Transient Test  Small Signal BW for Current Control

40 Non-Inverting V-I Floating Load IOUT = VP / RS IOUT = {(R2*VIN) / (R1A + R1B + R2)} / RS +5V 3.03A -5V -3.03A VP Op Amp Point of Feedback is VRS Op Amp Loop Gain forces +IN (VP) = -IN = VRS +1V -1V

41 Non-Inverting V-I Floating Load R O Reflected Outside of Op Amp

42 Non-Inverting V-I Floating Load FB#1 DC 1/  Derivation

43 Non-Inverting V-I Floating Load FB#1 1/  Derivation

44 Non-Inverting V-I Floating Load FB#1 1/  Data for R O No Load & Full Load I OUT RORO fz DC 1/  No Load0A  165Hz33.49dB Full Load1A  22.25Hz16.06dB

45 OPA548 Data Sheet Aol

46 Non-Inverting V-I Floating Load FB#1 1/  Plot for R O No Load & Full Load

47 Non-Inverting V-I Floating Load FB#1 1/  Tina SPICE

48 Non-Inverting V-I Floating Load FB#1 1/  Tina SPICE Results

49 Non-Inverting V-I Floating Load FB#1 1/  Tina SPICE Results

50 Non-Inverting V-I Floating Load FB#1 Loop Gain Tina SPICE Results

51 Non-Inverting V-I Floating Load FB#1 Transient Analysis Tina SPICE Circuit

52 Non-Inverting V-I Floating Load FB#1 Transient Analysis Tina SPICE Results

53 Non-Inverting V-I Floating Load Add FB#2 and Predict 1/  Note: Load Current Control begins to roll-off in frequency where FB#2 dominates

54 Large β Small β Answer: The largest β (smallest 1/β) will dominate! How will the two feedbacks combine?

55 Non-Inverting V-I Floating Load FB#2 Circuit

56 Non-Inverting V-I Floating Load FB#2 High Frequency 1/ 

57 Non-Inverting V-I Floating Load FB#2 fz1

58 Non-Inverting V-I Floating Load Tina SPICE Loop Test

59 Non-Inverting V-I Floating Load Aol and 1/  Tina SPICE Results

60 Non-Inverting V-I Floating Load Loop Gain Tina SPICE Results

61 Non-Inverting V-I Floating Load I OUT /V IN AC Response Circuit

62 Non-Inverting V-I Floating Load I OUT /V IN AC Tina SPICE Results

63 Non-Inverting V-I Floating Load I OUT /V IN Transient Circuit

64 Non-Inverting V-I Floating Load I OUT /V IN Transient Tina SPICE Results

65 Inverting V-I Floating Load IOUT = {-VIN*(RF/RI)} / RS IOUT = -VIN*{RF/ (RI*RS)} +5V -3.03A -5V +3.03A Op Amp Point of Feedback is VRS Op Amp Loop Gain forces VRS = -VIN (RF/RI) -1V+1V Stability Analysis & Compensation Techniques similar to Non-Inverting V-I Floating Load

66 Grounded Load V-I Improved Howland Current Pump  Basic Topology  Stability Analysis (w/effects of Ro) 1/  & Aol Test Loop Gain Test Transient Test  Small Signal BW for Current Control

67 Improved Howland Current Pump IL Accuracy Circuit RT allows for trim to optimum Z OUT and improved DC Accuracy

68 Improved Howland Current Pump V-I DC Accuracy Calculations 1% Resistors (w/RT=0) could yield only 9% Accuracy at T=25°C Still useful for V-I control in Motors/Valves  V-Torque Control Outer position feedback adjusts V for final position

69 Improved Howland Current Pump General Equation Set RX=RF and RZ=RI

70 Improved Howland Current Pump Simplified Equation

71 Improved Howland AC Analysis Op Amp sees differential [(-IN) – (+IN)] feedback  =  - -  + (Must be positive number else oscillation!) RF RI

72 Improved Howland AC Analysis

73 Improved Howland AC Analysis Include Effects of RO RF RI

74 Improved Howland  - Calculation

75 Improved Howland  + Calculation

76 Improved Howland 1/  Calculation

77 Improved Howland  - Calculation RO = Full Load

78 Improved Howland  + Calculation RO = Full Load

79 Improved Howland 1/  Calculation RO = Full Load

80 Improved Howland 1/  Calculation No Load & Full Load ILROfzfp DC 1/  Hi-f 1/  No Load0A 6.29  75.8Hz31.83kHz17.62dB77.17dB Full Load1A  44.08Hz31.83kHz19.45dB77.15dB Change in RO from No Load to Full Load has no significant impact on the 1/  Plot

81 OPA569 Data Sheet Aol

82 Improved Howland 1/  Plot - Full Load

83 Improved Howland 1/  Tina SPICE Plot - Full Load

84 Improved Howland Loop Gain Tina SPICE Plot - Full Load

85 Improved Howland Tina Transient Analysis Circuit RF RI

86 Improved Howland Tina Transient Analysis Results

87 Improved Howland Modified 1/  for Stability

88  + FB#2 Calculation to Modify 1/  for Stability

89 Improved Howland AC Analysis Final Design for Stability RF RI

90 Improved Howland AC Analysis 1/  - Final Design for Stability fcl

91 Improved Howland AC Analysis Loop Gain - Final Design for Stability fcl

92 Improved Howland AC Transfer Analysis IL/VIN - Final Design for Stability RF RI

93 Improved Howland AC Transfer Analysis IL/VIN - Final Design for Stability

94 Improved Howland Transient Analysis IL/VIN - Final Design for Stability RF RI

95 Improved Howland Transient Analysis IL/VIN - Final Design for Stability

96 High Current V-I General Checklist  Large Signal & Transient SOA Considerations (V=L*di/dt)  Bipolar Output Stages & Oscillations  High Current Grounding  High Current PCB Traces  High Current Supply Issues  Power Supply Bypass (Low f & High f)  Transient Protection (Supply, VIN, VOUT)  Power Dissipation Considerations (see “V-I Circuits Using External Transistors” section)  Consider: Short Circuit to Ground Power Dissipation Heatsink Selection Current Sense Resistor (RS) Power Dissipation

97 V-I Large Signal Limits: V=Ldi/dt

98 Violate the Laws of Physics and Pay the Price!

99 Instant V-I Reversal  SOA Violations

100 Output Stages fosc > UGBW oscillates unloaded? -- no oscillates with V IN =0? -- no Some Op Amps use composite output stages, usually on the negative output, that contain local feedback paths. Under reactive loads these output stages can oscillate. The Output R-C Snubber Network lowers the high frequency gain of the output stage preventing unwanted oscillations under reactive loads. PROBLEM SOLUTION

101 Ground Loops fosc < UGBW oscillates unloaded? -- no oscillates with V IN =0? -- yes Ground loops are created from load current flowing through parasitic resistances. If part of V OUT is fed back to Op Amp +input, positive feedback and oscillations can occur. Parasitic resistances can be made to look like a common mode input by using a “Single-Point” or “Star” ground connection. SOLUTION PROBLEM

102 PCB Traces fosc < UGBW oscillates unloaded? -- may or may not oscillates with V IN =0? -- may or may not DO NOT route high current, low impedance output traces near high impedance input traces. DO route high current output traces adjacent to each other (on top of each other in a multi-layer PCB) to form a twisted pair for EMI cancellation.

103 Supply Lines Load current, IL, flows through power supply resistance, Rs, due to PCB trace or wiring. Modulated supply voltages appear at Op Amp Power pins. Modulated signal couples into amplifier which relies on supply pins as AC Ground. Power supply lead inductance, Ls, interacts with a capacitive load, CL, to form an oscillatory LC, high Q, tank circuit. fosc < UGBW oscillates unloaded? -- no oscillates with V IN =0? -- may or may not PROBLEM

104 Proper Supply Line Decouple C LF : Low Frequency Bypass 10μF / Amp Out (peak) Aluminum Electrolytic or Tantalum < 4 in (10cm) from Op Amp C HF : High Frequency Bypass 0.1μF Ceramic Directly at Op Amp Power Supply Pins R HF : Provisional Series C HF Resistance 1Ω < R HF < 10Ω Highly Inductive Supply Lines SOLUTION

105 Transient Protection

106 V-I Circuits Using External Transistors  Choosing the Transistor  Power Dissipation Considerations  Traditional Floating Load Circuit  Novel V-I Using Opposite Polarity Transistor

107 Example: OPA335 and Bipolar Transistor Supply: 5V Utility Gain Buffer Output Swing: 0V to 5V Load:20ohm (250mA max) How do we choose the BJT?

108 Bipolar Junction Transistor (BJT) NPN Base Collector Emitter PNP Base Collector Emitter

109 Design Process for Selecting Transistor Do simple rule of thumb calculations Select device using parametric search (Digikey example) Do detailed analysis Repeat if design goals are not achieved.

110 Simple Rule of Thumb Calculations 1.Power / Package 2.Collector Current 3.Base Current 4.Vceo (Collector to Emitter Break Down Voltage) 5.Vbe (Base to Emitter Voltage)

111 DC Power Dissipation When is there maximum power in the output transistor? DC Signal P

112 AC Sinusoidal Signal AC Power Dissipation When is there maximum power in the output transistor? P

113 Maximum Power in the External Transistor Use the DC Maximum Power Dissipation for Worst Case Double the power for margin over temperature

114 PackageMaxPower T A = 25C No heat sink MaxPower T A = 85C No heat sink MaxPower T C = 25C R θJA 1in 2 pad R θJC SOT na-- SOT na-- DPAC IPAC TO na TO na Characteristics of Different Package Types For our example

115 TO-3 TO-220 IPAK DPAK SOT-223 SOT-23 Different Package Types

116 1.Power / Package 2.Collector Current 3.Base Current 4.Vceo (Collector to Emitter Break Down Voltage) 5.Vbe (Base to Emitter Voltage) We’ve looked at Power. Now let’s investigate current. Simple Rule of Thumb Calculations

117 Max Collector Current in the External Transistor The OPA335 is a “rail-to-rail” out Vout_max = Vopa_max – Vbe = 5V – 0.6V = 4.4V Max Output Current = (Vout_max)/RL =4.4V / (20Ω) = 220mA Add 20% margin Ic_max rating > (220mA)(1.5) = 330mA

118 Maximum Base Current in the External Transistor Standard BJT Power Transistor: Typical hfe_min = 20. Base Current = Ic_max / hfe_min = 220mA / (20) = 11mA (too high) Use a Darlington. Typical minimum hfe_typ = Base Current = Ic_max / hfe_min = 220mA / (1000) = 220uA (good) Use less than 2mA for good swing to the rail. Darlington

119 1.Power / Package 2.Collector Current 3.Base Current 4.Vceo (Collector to Emitter Break Down Voltage) 5.Vbe (Base to Emitter Voltage) Now let’s investigate voltage ratings. Simple Rule of Thumb Calculations

120 BJT Breakdown Voltages Max voltage across any junction is 5V Most transistor breakdown > 50V Add a protection resistor in the base Limit base current Provide Capacitive Isolation

121 Do simple rule of thumb calculations Select device using parametric search (Digikey example) Do detailed analysis Repeat if design goals are not achieved. Design Process Here is the are the results of the rule of thumb calculations Power Rating > 225mW Package Type: SOT23 Ic_max rating > 330mA Type: Darlington NPN Using Digikey parametric search Narrow from 4638  8 transistors.

122 The result of the Digikey parametric search. We choose the least expensive one $ Parametric Search Results

123 Do simple rule of thumb calculations Select device using parametric search (Digikey example) Do detailed analysis Repeat if design goals are not achieved. Design Process Now we verify if our choice will really work!

124 MMBT6427 Data Sheet Look at the “Maximum Ratings” No problem -- were working with 5V. Ic_max= 220mA (lots of margin)

125 Maximum Power / Junction Temperature Maximum power dissipation dictates device (junction) temperature Device temperature is also effected by -- Ambient temperature -- Package Type (Data specifications) -- Heat sink -- Air flow

126 Maximum Power / Junction Temperature Power_Maximum = 112.5mW Rule of thumb: double Power_Maximum. Power_Rating > 225mW (edge of Spec) Are we ok? MMBT6427 Transistor

127 Look at Thermal Model Thermal model with no heat sink Analogous to an electrical circuit T J = P D ( R θJA ) + T A T – is analogous to voltage R – is analogous to resistance P – is analogous to current

128 Use the Thermal Model Assuming T A = 25 o C T J = P D ( R θJA ) + T A = (112.5mW)(556 o C/W) + 25 o C = 87.5 o C What is the maximum ambient operating temperature? Tmax_ambient = 150 o C – 62.5 o C = 87.5 o C (Enough margin?)

129 T J = P D ( R θJC + R θCS + R θSA ) + T A P D – The power dissipation of the transistor T J – The junction temperature T C – The case temperature T S – The heat sink temperature T A – The ambient temperature Thermal Model for the Heat Sink

130 Case R θCS R θJC R θSA Heat Sink Ambient Junction Here is the Mechanical Description

131 T= P D ( R θJC + R θCS + R θSA ) + T A Junction to Case – R θJC Typical Transistor in a TO220 Package

132 T= P D ( R θJC + R θCS + R θSA ) + T A Case to Sink – R θCS

133 T= P D ( R θJC + R θCS + R θSA ) + T A Sink to Ambient – R θJC Example Heat Sink

134 T= P D ( R θJC + R θCS + R θSA ) + T A Sink to Ambient – R θJC Natural Convection is 100 Feet /min

135 Detailed Analysis So Far 1.Breakdown Voltages 2.Ic_max 3.Power / Junction Temperature 4.V BE / Output Swing 5.I B / Op-Amp Drive

V 250mA Output Swing (Consider Vbe) Vout_buffer_max = 5V – 1.4V = 3.6V Disadvantage of the Darlington Darlington MMBT6427 Transistor 1.4V

137 Typical ΔVbe = -2mV/ o C At -25 o C ΔVbe = (-2mV/ o C)(T – Troom) ΔVbe = (-2mV/ o C)(-25 o C – 25 o C) = 0.1V Vbe = 1.4V + 0.1V = 1.5V At 85C Vbe = 1.4V V = 1.28V Output Swing (Consider Vbe over Temperature)

138 What’s the Real Output Swing? What’s the Real Max Current Out? Iout_max Estimate: Iout_max = Vout/RL = 5/20 = 250mA From the Graph: Vbe = 1.4V Refine Iout_max: Iout_max = (Vout – Vbe)/RL = (5 -1.4)/20 = 180mA Refine Vbe: Vbe = 1.37V 1.4V 250mA 180mA 1.37V MMBT6427 Transistor

139 Is the Base Current Okay? Worst Case hfe = 2.7k Ib_max = Ic_max / hfe_min Ib_max = 250mA / 2700 = 92.5uA (no problem) MMBT6427 Transistor

140 Summary of Buffer Design Using Bipolar Transistor Spec.Design Worst Case Transistor Data Sheet Rating Comment Max Current250mA500mA Max Vbe1.5VLimits the buffer output swing to 3.5V Max Ambient Temperature 87.5CDetermined using power dissipation and the thermal model. Ib – Max Base Current 92.5uA Vce5V40V Vcb540V

141 Bipolar Junction Transistor (BJT) NPN Base Collector Emitter PNP Base Collector Emitter

142 What about design using Power MOSFETS? N-Channel Gate Drain Source P-Channel Gate Drain Source

143 Power MOSFET vs Power BJT Power MOSFET Voltage to Current device – no gate current Vgs depends on transistor and Id Vgs typically ranges 2V to 10V Power BJT Current to Current I device – base current significant Vbe = 0.7V for standard Vbe = 1.4V for Darlington Design process for MOSFET similar to BJT

144 Current Sources Design Example Two Different Topologies Traditional Floating LoadInverted Transistor Floating Load 1.Easy To Stabilize 2.Headroom Limited by V BE (V GS ) 3.Bandwidth Limited By Load 1.More Difficult to Stabilize 2.More headroom than “Traditional” 3.Wider Bandwidth than “Traditional”

145 Standard Floating Load Current Source with BJT Current Boost Vin = V G1 *1k/(1k+9k) Vin = 0.1V G1 Vrsen = Vin I_load = Vrsen/Rsen LOAD Sense Resistor + Vrsen -

146 LOAD Sense Resistor + Vrsen - Series Resistor Limits Base Current and Isolates Op-Amp From Capacitance. Traditional Floating Load Current Source DC Analysis Asymmetrical supplies Increased output swing  faster di/dt

147 SpecDesign Worst CaseTransistor Data sheet Ib max1.5A/750 = 2mAhfe_min = 750 Op-Amp Swing25 – 1.0 = 25 – 1.5 = Output Swing BJT 24 – 2.4 = 23.5 – 2.6 = Iout Max21.6V/15 = 20.9V/15 = Icmax=4A Pmax(25) 2 /(4*15)=10.12W--see Tj -- Ta max76.5C (Ta max> 60C) Ta=60C=Pd(Rjc + Rjs + Rsa) + Ta =10.12W( ) + 60 =133C Tjmax=150C (Using heat sink) DC Analysis of Transistor BD675

148 AC Stability Analysis Short out the signal source Add in the test circuitry

149 Before Tina SPICE  Do a Hand Analysis Find 1/β by looking at the feedback path. 1/ β = Vtest/Vfb This section is a simple buffer

150 Before Tina SPICE  Do a Hand Analysis Replace the buffer with a wire, and analyze as a series circuit.

151 Hand Analysis of β (1/β) High and Low Frequency Extremes β Transfer Function

152 33dB 16Hz 20dB/d ec Problem 40dB/dec rate-of- closure 1/β Curve Using Information from the Transfer Function AOL

153 Add another feedback path to stabilize the circuit. This circuit’s 1/β plot. Using Information from the Transfer Function How will the two feedbacks combine?

154 Large β Small β Answer: The largest β (smallest 1/β) will dominate! How will the two feedbacks combine?

155 General Example: How would the red and blue curves add? Remember curves shown are 1/β curves, not β curves!

156 General Example: How would the red and blue curves add? Remember that the curves shown are 1/β curves, not β Curves! The combined feedback will follow the smallest 1/β curve (the larges β).

157 FB#2 FB#1 1decade Move the FB#2 curve up or down until there is 1 decade margin between the AOL curve and the intersection with the FB#1 curve. 1decade Set the cut frequency so that there is one decade margin before the intersection of FB#1 and FB#2. How to Select FB#2 to Stabilize the Circuit

158 FB#2 FB#1 Stable The combination of FB#1 and FB#2 has a 20dB/decade rate-of- closure. How to Select FB#2 to Stabilize the Circuit

159 How to Separate the Two Paths Break the FB#1 path here!

160 Solve for β β

161 Plot for 1/β

162 Values Required for this Example f = 15Hz, High Freq 1/β = 50dB FB#2 FB#1 1decade f = 15Hz High freq 1/β = 50dB

163 Using f = 15Hz, High Freq 1/β = 50dB Solve for Rd and Cf

164 Verify Stability Using Tina-SPICE Plenty of phase margin Worst Case 45 o

165 Look at Transient Response Using Tina-SPICE

166 Look at Transient Response Using Tina-SPICE

167 Phase(Iout/Vin) Mag(Iout/Vin) -3dB -45 o The AC Transfer Function Using Tina-SPICE

168 Current Sources Design Example Two Different Topologies Traditional Floating LoadInverted Transistor Floating Load 1.Easy To Stabilize 2.Headroom Limited by V BE (V GS ) 3.Bandwidth Limited By Load 1.More Difficult to Stabilize 2.More headroom then “Traditional” 3.Wider Bandwidth then “Traditional” Done with the traditional floating load Lets look at the inverted topology.

169 Inverted Transistor Floating Load DC Analysis Source Drain Gate Common source configuration. Vgs does not effect headroom.

170 Inverted Transistor Floating Load DC Analysis Zener protects gate from over voltage. Resistor Isolates Op-Amp from Gate Capacitance

171 Inverted Transistor Floating Load AC Analysis Add test circuit DC Bias Required for proper functionality

172 Stability Analysis of Inverted Transistor Floating Load Circuit with No Compensation Note the Complex Conjugate zero (180 o phase shift). 60dB Rate of Closure

173 Add a Zero into Feedback Path Cin MOSFET

174 Select f=100Hz so that the zero occurs before the complex conjugate. Add a Zero into Feedback Path

175 AC Stability Result Zero In Feedback Note: The complex conjugate zero is gone. Loop Gain=0 Phase margin < 0

176 FB#2 Use another Feedback Path FB#2 will dominate at high frequencies

177 Use another Feedback Path 20dB/dec 0dB

178 Hand Calculations for New Feedback Path β

179 20dB/dec 0dB fc = 1kHz In this example Hand Calculations for New Feedback Path

180 FB#2 We want to set the cut frequency at about 1kHz Hand Calculations for New Feedback Path

181 Final Compensation: Look at AC Stability

182 Plenty of phase margin (65deg) The composite 1/β is relatively flat for all significant loop gain. Final Compensation: Look at AC Stability

183 Final Compensation: Look at Transient

184 Final Compensation: Look at Transient

185 The AC Transfer Function Using Tina-SPICE

186 Current Sources Design Example Summary Traditional Floating LoadInverted Transistor Floating Load 1.Easy To Stabilize 2.Headroom Limited by V BE (V GS ) 3.Bandwidth Limited By Load 1.More Difficult to Stabilize 2.More headroom then “Traditional” 3.Wider Bandwidth then “Traditional” For the example: Vout Swing Max = 20.9V Bandwidth = 100Hz (Bandwidth is maximized) For the example: Vout Swing Max = 24.65V Bandwidth = 800Hz (This could be compensated for wider bandwidth)

187 High Power V-I Circuit Applications  Power Packages  Parallel Outputs for Higher Current  V-I Using External Shunt  V-I Using Internal Shunt (Burr-Brown Exclusive)  Bridge Tied Load  Constant Current PWM Driver

188 Power Operational Amplifier Packages OPA569 HSOP-20 OPA567 QFN-12 5x5mm DRV104 SO-14DRV103 SO-8 OPA561 HTSSOP-20 LOG114 QFN-16 4x4mm OPA548 TO OPA549 ZIP TO-3 (History) OPA548 DDPAK-7 OPA569 & OPA564 Bottom Pwr Pad OPA564 HSOP-20 Top Pwr Pad

189 Power Operational Amplifier Packages OPA569 OPA567 QFN 12-pin Chip Cap QFN-28-pin SON-8-pin SSOP 20-pin

190 Power Amplifier OPA567, 569, 561 & DRV103, 104 Adapter Boards Available From Tucson OPA567 OPA569 Here’s 2 of Them

191 Paralleling Outputs for More Drive Current Power Op Amps

192 OPA548 Power Op Amp Application Paralleling for More Output Current +8V to 60V Total Supply NOTES: (1) Works well for G 10. Gains (resistor ratios) of the two amplifiers should be carefully matched to ensure equal current sharing. (2) As configured (ILIM connected to V–) output current limit is set to 10A (peak). Each amplifier is limited to 5A (peak). Other current limit values may be obtained, see Figure 3, “Adjustable Current Limit”. 3A cont 6A continuous Output Swing to Rail Spec with 3A Load (V+) – 4.1V (V–) + 3.7V

193 OPA569 Power Op Amp Application Paralleling for More Output Current Vos is Averaged and BW, SR are That of One Amplifier +2.7V to 5.5V Total Supply 2A cont Output Swing to Rail with 2A Load (V+) – 0.3V (V–) + 0.3V 4A continuous

194 Bridge Tied Load for Floating Output Power Op Amps

195 OPA549 Power Op Amp Application Bridge => 2x Voltage & 4x Power Out VTEC = 14V Won’t Swing Very Close to Supply Rail but Drives 8A Out +24V  5V High Power TEC, up to 8A Output Swing to Rail with 8A Load (V+) – 4.8V (V–) + 4.6V +24V  5V Neil Albaugh Circuit Simulation Physical Contact With a Circuit

196 OPA569 Power Op Amp Application Bridge => 2x Voltage & 4x Power Out Can be 3V Usually +2.5V Output Needs to Swing Close to Supply Rail Only IC in Industry That Does This!!!  300mV Physical Contact With a Circuit Can be 3V High Power TEC, up to 2A

197 Feedback using External Shunt Resistor Designing Power Current Sources

198 OPA541 Power Op Amp Application Howland Power Current Source Transfer Function 500mA out per 10V in = 50mA per Volt RS 1Ω Rtrim 1Ω I V RL

199 OPA541 Power Op Amp Application Howland Power Current Source Transfer Function 600mA out per 10V in = 60mA per Volt

200 OPA541 Power Op Amp Application Howland Power Current Source

201 OPA569 Power Op Amp Application -5V Single Supply with +Vin Constant Current Using Ext I SHUNT Feedback Grounded Anode

202 OPA569 Power Op Amp Application -5V Single Supply with +Vin Grounded Anode LED Driver Scope Photo +1V 0V -1.25V V LED On LED Off 0V Minus Voltage Plus Voltage

203 OPA569 Power Op Amp Application -5V Single Supply with +Vin Grounded Anode LED Driver Scope Photo LED On LED Off 40  sec Fall 50  sec Fall Minus Voltage +1V 0V -1.25V V 0V Plus Voltage

204 OPA569 Power Op Amp Application -5V Single Supply with +Vin Grounded Anode LED Driver Scope Photo LED Off LED On 15msec Rise Slow 100  sec Rise Minus Voltage +1V 0V -1.25V V 0V Plus Voltage

205 OPA569 Power Op Amp Application -5V Single Supply with +Vin Grounded Anode LED Driver Scope Photo LED On LED Off 12  sec Fall Minus Voltage +1V 0V -1.25V V 0V Plus Voltage

206 OPA569 Power Op Amp Application -5V Single Supply with +Vin Grounded Anode LED Driver Scope Photo LED Off LED On 1.5msec Rise Slow 12  sec Rise Minus Voltage +1V 0V -1.25V V 0V Plus Voltage

207 OPA569 Power Op Amp Application -5V Single Supply with +Vin Grounded Anode LED Driver Scope Photo LED Off LED On Minus Voltage +1V 0V -1.25V -2.25V 0V Plus Voltage

208 Feedback using Internal Current Monitor (Instead of External Shunt Resistor) Designing Power Current Sources

209 OPA569 Power Op Amp Application  2.5V Bipolar Supplies with -Vin Constant Current Using I MONITOR Feedback - + Io Constant Current Vin- 4.2k  Feedback Through I MONTIOR OPA V -2.5V R R SET 33k  350mA I MONTIOR = (1/475 x Io) V +2.5V Luxeon Star-0 High Power LED on Heat Sink -2.5V +2.5V Io is Independent of changes in Rload (LED aging). Iin =  2.5V / 4.2k  =  0.6mA Vo pin Io = Iin x 475 Io = (Vin / Rin) x 475 = 285mA Grounded Cathode

210 OPA569 Power Op Amp Application  2.5V Bipolar Supplies with -Vin Grounded Cathode LED Driver LED On LED Off +2.5V -2.5V +2.5V -2.5V +2.5V -2.5V Scope Photo

211 OPA569 Power Op Amp Application  2.5V Bipolar Supplies with -Vin Grounded Cathode LED Driver LED On LED Off +2.5V -2.5V +2.5V -2.5V +2.5V -2.5V Scope Photo

212 OPA569 Power Op Amp Application +5V Single Supply with +Vin Constant Current Using I MONITOR Feedback - + Io Constant Current Vin- 4.2k  Feedback Through I MONTIOR OPA569 +5V R R SET 33k  350mA I MONTIOR = (1/475 x Io) V +5V Luxeon Star-0 High Power LED on Heat Sink 0V +2.5V Io is Independent of changes in Rload (LED aging) and +5V. Iin = +2.5V / 4.2k  = +0.6mA Io = Iin x 475 Io = (Vin / Rin) x 475 = 285mA Vo pin +5V Use REF3025 to make independent of +5V. +2.5V +5V 0V +2.5V 1,500pF Vout V LED 10k  +5V to Anode

213 OPA569 Power Op Amp Application +5V Single Supply with +Vin +5V to Anode LED Driver Scope Photo +5V 0V +5V 0V +2.5V +5V 0V +2.5V LED On LED Off

214 OPA569 Power Op Amp Application +5V Single Supply with +Vin +5V to Anode LED Driver LED On LED Off Scope Photo +5V 0V +5V 0V +2.5V +5V 0V +2.5V

215 OPA569 Power Op Amp Application +5V Single Supply with +Vin +5V to Anode LED Driver LED Off LED On Scope Photo +5V 0V +5V 0V +2.5V +5V 0V +2.5V 15  sec Fall 35  sec Delay Charging Internal Gate Cap 25  sec Fall

216 OPA569 Power Op Amp Application +5V Single Supply with +Vin +5V to Anode LED Driver LED On LED Off Scope Photo +5V 0V +5V 0V +2.5V +5V 0V +2.5V 5  sec Rise 4  sec Rise

217 OPA569 Power Op Amp Application +5V Single Supply with +Vin +5V to Anode LED Driver Scope Photo +5V 0V +5V 0V +2.5V +3.6V 0V +2.5V LED On LED Off +5V

218 OPA569 Power Op Amp Application +5V Single Supply with +Vin +5V to Anode LED Driver Scope Photo +5V 0V +5V 0V +2.5V +3.6V 0V +2.5V LED On LED Off +5V

219 OPA569 Power Op Amp Application +5V Single Supply with +Vin +5V to Anode LED Driver Scope Photo +5V 0V +5V 0V +2.5V +3.6V 0V +2.5V LED On LED Off +2.5V

220 OPA569 Power Op Amp Application +5V Single Supply with +Vin Constant Current Using I MONITOR Feedback - + Io Constant Current Vin+ 4.2k  Feedback Through I MONTIOR OPA569 +5V R R SET 33k  350mA I MONTIOR = (1/475 x Io) V +2.75V Luxeon Star-0 High Power LED on Heat Sink Io is Independent of changes in Rload (LED aging) and +5V. Iin = +2.5V / 4.2k  = +0.6mA Io = Iin x 475 Io = (Vin / Rin) x 475 = 285mA Vo pin 0V +2.5V 1,500pF Vout +0.25V +0.25V offset is used to maintain min voltage on I MONITOR Current Source Grounded Cathode

221 OPA569 Power Op Amp Application +5V Single Supply with +Vin Grounded Cathode LED Driver Scope Photo +5V 0V +2.8V 0V +2.5V LED On LED Off

222 OPA569 Power Op Amp Application +5V Single Supply with +Vin Grounded Cathode LED Driver Scope Photo +5V 0V +2.8V 0V +2.5V LED On LED Off +2.5V

223 OPA569 Power Op Amp Application +5V Single Supply with +Vin Grounded Cathode LED Driver Scope Capture 0V +2.5V 0V +2.5V LED On LED Off 0V +2.5V Very Clean, Cf = 33,000pF Clean (small overshoot), Cf = 1,500pF Oscillation (333kHz, 0.64Vp-p), Cf = 0 pF V: 0.2V / small div T: 0.5us / small div 3us per cycle => 333kHz Loop Instability Stable 0.64Vp-p

224 OPA569 Power Op Amp Application +5V Single Supply with +Vin Grounded Cathode LED Driver Scope Photo +5V 0V +2.8V 0V +2.5V LED On LED Off +2.5V 5  sec Fall

225 OPA569 Power Op Amp Application +5V Single Supply with +Vin Grounded Cathode LED Driver Scope Photo +5V 0V +2.8V 0V +2.5V LED On LED Off +2.5V 12  sec Delay Charging Internal Gate Cap 12  sec Rise

226 OPA569 Power Op Amp Application +5V Single Supply with +Vin Grounded Cathode LED Driver Scope Photo +5V 0V +2.8V 0V +2.5V LED On LED Off +2.5V

227 OPA569 Power Op Amp Application +5V Single Supply with +Vin Grounded Cathode LED Driver Scope Photo +5V 0V +2.8V 0V +2.5V LED On LED Off +2.5V

228 Feedback using Internal Current Monitor (Instead of External Shunt Resistor) Designing Power Current Sources

229 OPA569 Power Op Amp Application +5V Single Supply, Current Source Tina Simulation

230 OPA569 Power Op Amp Application +5V Single Supply, Current Source Tina Simulation

231 OPA569 Power Op Amp Application +5V Single Supply, Current Source Tina Simulation

232 OPA569 Power Op Amp Application +5V Single Supply, Current Source Tina Simulation

233 Voltage Source Drive Designing Power Voltage Sources Tina Simulations

234 OPA569 Power Op Amp Application +5V Single Supply, Voltage Source Tina Simulation

235 OPA569 Power Op Amp Application +5V Single Supply, Voltage Source Tina Simulation

236 OPA569 Power Op Amp Application +5V Single Supply, Voltage Source Tina Simulation

237 Bridge Tied Load for Floating Output With Constant Current Source Power Op Amps

238 OPA551 Power Op Amp Application 24V Single Supply, Current Source

239 OPA551 Power Op Amp Application 24V Single Supply, Current Source

240 OPA551 Power Op Amp Application 24V Single Supply, Current Source

241 OPA551 Power Op Amp Application 24V Single Supply, Current Source

242 OPA725 + Power Transistors Power Op Amp Application  5V Single Supply, Current Source

243 OPA725 + Power Transistors Power Op Amp Application  5V Single Supply, Current Source

244 OPA725 + Power Transistors Power Op Amp Application  5V Single Supply, Current Source

245 OPA569 Power Op Amp Application +5V Single Supply, Bridge Current Source Tina Simulation Resistive Load

246 OPA569 Power Op Amp Application +5V Single Supply, Bridge Current Source Tina Simulation Resistive Load

247 OPA569 Power Op Amp Application +5V Single Supply, Bridge Current Source Tina Simulation Resistive Load

248 OPA569 Power Op Amp Application +5V Single Supply, Bridge Current Source Tina Simulation Resistive Load

249 OPA569 Power Op Amp Application +5V Single Supply, Bridge Current Source Tina Simulation Resistive Load

250 OPA569 Power Op Amp Application +5V Single Supply, Bridge Current Source Tina Simulation Resistive Load

251 OPA569 Power Op Amp Application +5V Single Supply, Bridge Current Source Tina Simulation Inductive Load

252 OPA569 Power Op Amp Application +5V Single Supply, Bridge Current Source Tina Simulation Inductive Load

253 OPA569 Power Op Amp Application +5V Single Supply, Bridge Current Source Tina Simulation Inductive Load

254 DRV103 / DRV104 Low or Hi PWM Drivers PWM Constant Output Current Application

255 Up to 3A Out SO-8 PowerPad 8V-40V V Delay VrefOsc PWM 0.1Ω Load 5.2Ω 9mH INA139 OPA nF 10K 2.2nF 191K 100K NC Iset 1A/V Input 5V DRV DRV103 Constant Current PWM Driver Low-side Switch DMOS Power Transistor

256 DRV103 Constant Current PWM Driver

257 Up to 1.5A peak SO-8 PowerPad 8V-32V DMOS Power Transistor V Delay VrefOsc PWM Load 5.2Ω 9mH INA139 OPA nF 10K 2.2nF 191K 100K NC Iset 0.5A/V Input 5V 470pF 0.2Ω DRV ,9 5 6, DRV104 Constant Current PWM Driver High- side Switch

258 DRV104 Constant Current PWM Driver

259 The End… Or Just the Beginning of High Current V-I Circuits? John Brown Tim Green Art Kay Tina SPICE