Real-Time Simulation: Applications to More Electric Aircrafts Embraer March 10, 2010 Christian Dufour, Ph.D. Senior Simulation Specialist, Power Systems and Drives

Lecture Plan 2 About More Electric Aircraft Real-Time Simulator Technology update Onboard Ship Power System example. Power Electronic Simulation on RT-LAB Tools for Electric System Simulation Conclusions Test Automation and Sequencer

 About more electric aircrafts 3

Why More Electric Aircrafts?  Efficiency Bleedless engine design can provide for energy saving during flight. Not so obvious: MEA is heavier than normal plane 4

Classic airplane power distribution (A320) Propulsion (trust): 20MW Electrical (200kW)  Avionics, lights, fans, In-flight entertainment Pneumatic 1.2MW  Cabin pressurization, Air conditioning, Icing protection Hydraulics (240 kW, at peaks)  Surface actuation, landing gear operation, braking, doors Mechanical  Fuel and oil pump local engine 5

Example of a More Electric Aircraft: Boeing 787  Boeing 787 All onboard systems are electric: APU, Brakes, Cabin pressurization, Wing ice protection With 4 primary 230 VAC, 3ph, variable frequency Generators with 230/115V AC and 28 VDC busses. Bleedless engines 6

Possible all-DC Bus MEA Highly redundant configuration Composed of many power converters 7 Source: Virginia Polytechnic

 Real-time simulation basics 8

Real-Time Simulation : Introduction Free Running Simulation Faster than real-time Slower than real-time 9

Real-Time Simulation : Introduction Real-Time Simulation 10 Sine equa none conditions for real-time algorithms  Non-iterative  Fixed –step (disqualify Spice-type or Saber simulation algorithm for example) IMPORTANT DISTINCTION  In real-time simulation, ALL time step must complete below Ts  Consequently, even if the total calculation time is smaller than the real time to compute, it may not meet real-time criteria

Controlled Process: a plant and its controller Main Real-Time Simulation Applications: RCP and HIL  RCP: the controller is implemented using a Real-Time Simulator  HIL: the controller is tested with a plant model on a Real-Time Simulator RT-LAB Controller Rapid Control Prototyping Hardware-in-the-Loop RT-LAB

Main Purpose of Real-Time Simulation  It is sometimes difficult to test a power systems device in its working environment or in real life condition.  Solution: One can connect a real network device (ex: a FACTS controller) to a simulated power grid  Other common applications: statistical testing, correlation testing 12 Actuators Sensors MODEL OF POWER GRID

Evolution of Real-Time Simulator Technology Digital COTS Simulators Digital COTS Simulators COTS Sim-On-Chip COTS Sim-On-Chip Digital Custom Simulators Digital Custom Simulators Analog Simulators Analog Simulators Model Based Design Hybrid (Analog/Digital) Simulators Hybrid (Analog/Digital) Simulators square feet Hybrid Simulator RT-LAB 2009: 1 cabinet, 3 PC with 24 core in total 32 to 64 cores would be required to simulate the detailed HQ network

Controller Model Design (Simulink Block Diagram) Generate Software from Model Upload Software to Real-Time Simulation Platform Correct Design Iteratively About the Concept of Model-based Design (simplified) 14 Test

Motorized Wheels Deliver Traction effort Alternator Generates the electrical power AC Control Group Controls engine load and power flow Chopper Assembly Dissipates superfluous energy during breaking Example #1: Off-Highway Vehicle (GE-OHV)

I/O Example #1: Off-Highway Vehicle (GE-OHV) RT-LAB TestDrive (LabView Based Interface) Actual ECU Truck model include:  Dynamics  Inverters  Motors Drives (IM)  Alternator  DC-bus  DC-bus choppers  Etc..

17 Example #2: All electric ship Yanhui Xie Seenumani, G. Jing Sun Yifei Liu Zhen Li, “A PC-Cluster Based Real-Time Simulator for All- Electric Ship Integrated Power Systems Analysis and Optimization”, Electric Ship Technologies Symposium, ESTS '07. IEEE, Arlington, VA., May 2007 pp Characteristics:  Highly redundant reconfigurable power system  Composed of many drives including propulsion  Many power converters and switches

18 Test case: ZONE 1 - PORT BUS - DC FAULT Starboard Bus ZONE 1 Fault applied from t = 0.1s to t = 0.4s Port Bus ZONE 1 ZONE 2

19 All-Electric Ship Real-time Simulation Performance Test 1: 2 Zone AES 1 eMEGAsim target 6 (of 8) processor cores used Minimum achievable Ts = 32 μs Ts = 50 μs Test 2: 4 Zone AES 2 eMEGAsim targets Dolphin PCI-SCI comm. link 12 (of 16) processor cores used Minimum achievable Ts = 33 μs

Components of a real-time simulator  Real-time simulator components 20

RT-LAB solutions for power systems OPAL-RT provides various tools for the simulation of power systems, motor drives and power electronic converter are provided ARTEMiS: Real-time enabler for SimPowerSystems RTeDRIVE: Power Electronics and motor drives toolbox 21

Opal-RT Toolboxes for electric system simulation  ARTEMiS Plug-in to SimPowerSystems Makes pre-computation of circuit modes to allow real-time performance Increase stability and precision 22

Opal-RT Toolboxes for electric system simulation  RTeDRIVE A specialized library of IGBT/GTO/MOSFET inverters/choppers (2- and 3-level) Use interpolated switching functions Compatible with SPS or Simulink only 23

 RT-LAB features 24

HILBox PC1 PCI EXPRESS CPU Simulink Model Simulink Model Single-, Dual-, or Quad-Core RT-LAB eMEGAsim Simulator Hardware Architecture 25 CPU Sh.Mem. Simulink Model Simulink Model Host/Target Architecture Windows QNX & RT-Linux RTOS SIMULINK/RTW based Multi-core support PCI

HILBox PC1 PCI EXPRESS CPU Simulink Model Simulink Model Single-, Dual-, or Quad-Core RT-LAB eMEGAsim Simulator Hardware Architecture 26 CPU Sh.Mem. Simulink Model Simulink Model Host/Target Architecture Windows QNX & RT-Linux RTOS SIMULINK/RTW based Multi-core Processors Shared-Memory Multi-CPU board PCI RS-232, CAN, TCP/IP IEC61850, LoadRunner PCI PCIe Extension User has the possibility to add PCI cards to the simulator with standard Protocol like TCP/IP, UDP/IP, RS-232 Or to develop and study advanced protocols (ex: IEC-6185)

HILBox PC1 PCI EXPRESS CPU FastCom CPU Sh.Mem. PCI Express RT-LAB eMEGAsim Simulator Hardware Architecture 27 Host/Target Architecture Windows QNX & RT-Linux RTOS SIMULINK/RTW based Multi-core processors Shared-Memory Multi-CPU board 16 AO 16 AI Carrier w (op511x) 16 DO 16 DI Carrier (op5210) FPGA (op5142) 16 DO 16 DI Carrier (op5210) 16 AO 16 AI Carrier w (op511x) Digital IO requirements For power Electronics Must be capable of sampling Thyristor/ IGBT/GTO/MOSFET gate with great accuracy The latency must also be very low so it does not to slow down the simulation (PCI Express)

Sampling of fast PWM gate signals 28 For this purpose, PWM pulse are captured on the FPGA card by 100MHz counters Normalized ratio (Time stamp) is send to the inverter models on the CPU The model on the CPU use the Time Stamps to compute interpolated voltages

Effect of switch gate sampling and interpolation RTeDRIVE inverter model use the time stamps to produce very accurate results  Example: a simple DC chopper (PWM=10kHz, Ts=10µs)  Bad sampling (like if we use regular SPS) causes important non-linearity in the input-output characteristic  But very linear caracteristic with RTeDrive TSB inverters T carrier /T s =10 SimPowerSystems EMTP, PLECS TSB

Effect of switch gate sampling and interpolation Precise enough to take into account deadtime effect smaller that the sample Time  Below is the effect of dead time increment of 2 µs (with a sample time of 10µs!)

HILBox PC1 PCI EXPRESS CPU FastCom CPU Sh.Mem. PCI Express Hardware Architecture (FPGA models) 31 Host/Target Architecture Windows QNX & RT-Linux RTOS SIMULINK/RTW based Multi-core processors Shared-Memory, Multi-CPU board 16 AO 16 AI Carrier w (op511x) 16 DO 16 DI Carrier (op5210) FPGA (op5142) 16 DO 16 DI Carrier (op5210) 16 AO 16 AI Carrier w (op511x) Xilinx System Generator Blockset Model Xilinx SG model Models with 10 ns sample rate can be coded on this card! FPGA user programmability for advanced model design The FPGA card can be programmed by the user using Xilinx System Generator No VHDL language skill required. It is a Simulink blockset

HILBox PC2 Dolphin PCI Expandability FireWire INFINIBAND switch DOLPHIN SCI /PCIe (2 to 5 us latency) HILBox PC1 PCI EXPRESS CPU Simulator Hardware Architecture (Expandability) AO 16 AI Carrier w (op511x) 16 DO 16 DI Carrier (op5210) Dolphin CPU Sh.Mem. Host/Target Architecture Windows QNX & RT-Linux RTOS SIMULINK/RTW based Multi-core processors Shared-Memory Multi-CPU board FPGA (op5142) 16 DO 16 DI Carrier (op5210) 16 AO 16 AI Carrier w (op511x) PCI Express

About the necessity for testing  Real-Time Solvers for Power Systems 33

Simulation solvers for power systems  Key characteristics of power systems Contains a wide range of frequency modes  Requires ‘stiff’ fixed-step solvers. Stiff solver remains stable even with mode above the simulation Nyquist limit. Contains a lot of PWM-driven power electronics  The simulator must avoid sampling effect when computing IGBT pulse ‘events’ internally or when reading PWM pulses from its I/Os 34

Stiff solvers methods for power system simulation  Simulation methods electric systems:  State-Space (SimPowerSystems)  Switching-function (Power Electronics & converters)  FPGA-based methods

Stiff solvers methods for power system simulation  State-Space approach of SimPowerSystems We can also find the exact state-space solution With k, matrix set index for switch permutations This can be discretized with the trapezoidal method like in SimPowerSystems for Simulink Trapezoidal method: order 2. It can also be discretized by higher order methods Higher order methods (order 5) implemented in ARTEMiS, a solver package of eMEGAsim.

Stiff solvers methods for power system simulation  State-Space approach Continuous time state-space expression Solution for time step T: How to compute the ‘matrix exponential’ e AT ? Trapezoidal method (order 2) ARTEMiS art5 method (order 5) TALYOR EXPENSION

Effect of higher order discretization Artemis ART5 solver more precise than Trapezoidal solver at 100 us Simple case of RLC circuit energization

Numerical stability issues  Discretized systems is not guarantied to be stable It depends on how Laplace poles are ‘mapped’ in the z domain. Ex: Forward Euler has poor stability A-stability (Stiff stability) (ex: trapeze method) guaranty discrete stability (for linear systems) y’= y Re{ } Im{ } -2/T Forward Euler Stability Region RLC network Euler T=0.01µs Laplace pole (s) mapping RLC network Trapeze T=100µs Trapeze Stability Region

Numerical stability issues with trapezoidal integration  Even if it is stable, the trapezoidal rule (tustin) is prone to numerical oscillations The z-domain mapping is stable but oscillatory for high frequency Laplace poles

Numerical stability issues with trapezoidal integration  A-stable methods can be highly oscillatory How are mapped high frequency poles? It depends on the ‘stability function’ again y’= y Re{ } Im{ } Laplace map y(n+1)=zy(n) Re{z} Im{z} Z- domain map Trapeze (A-stable) ARTEMiS art5 (L-stable) z mapping near -1 means oscillations

* * * * V_load near zero for positive I_load by lower anti-parallel diode action if both GIBT are turned off Gup Glow RTeDRIVE approach: interpolated switching function  Switching function approach A special solver method for power electronic system using high-frequency PWM. It is a ‘simple’ controlled voltage source! Interpolation methods are used to obtain high accuracy in the Opal-RT RTeDRIVE package High impedance mode supported now. ~100V ~0 0 1 gate V_load

Effect of switch gate sampling and interpola tion RTeDRIVE inverter model use the time stamps to produce very accurate results  Example: a simple DC chopper (PWM=10kHz, Ts=10µs)  Bad sampling (like if we use regular SPS) causes important non-linearity in the input-output characteristic  But very linear caracteristic with RTeDrive TSB inverters T carrier /T s =10 SimPowerSystems EMTP, PLECS TSB

Effect of switch gate sampling and interpolation Precise enough to take into account deadtime effect smaller that the sample Time  Below is the effect of dead time increment of 2 µs (with a sample time of 10µs!)

Interpolated switching functions: example case 1 Mitsubishi Electric Co Japan, 2004 ARTEMiS used for rectifier side RTeDRIVE used for inverter 45 © Opal-RT MITSUBISHI HIL Simulation Physical System PWM 9kHz PWM 4.5kHz PWM 2.25kHz

RT-LAB Electric Drive Simulator Example 2 – Industrial Motor Drives 46 Multi Level Inverter Drive CONVERTEAM-ALSTOM (France) line voltage wave form 1200V This Controller is connected Externally to the Simulator

Example 3 – Industrial Motor Drives 47 Multi Level Inverter Drive CONVERTEAM-ALSTOM (France) Motor Acceleration Emergency Pulse shutdown  Pulse shutdown modeled with the help of Converteam  Required the design of an hybrid switching-function with high-impedance capability Results of Hardware-In-the-Loop Tests

Importance of Interpolation (again)  Interpolation is important because the Real-Time Simulator is a sampled system  The above figure shows the typical effect of neglecting ‘interpolation’ during the simulation. EM Torque Currents C. Bordas, C. Dufour, O. Rudloff, “A 3-Level Neutral-Clamped Inverter Model with Natural Switching Mode Support for the Real-Time Simulation of Variable Speed Drives”, Proceedings of the 8th International Symposium on Advanced Electromechanical Motion Systems (ELECTROMOTION-2009), Lille, France, July 1-3, 2009 Converteam case  Ts=40us  Deadtime=20us  Fpwm=400Hz  Interpolation 1 second DEAD-TIME WITH INTERPOLATION WITHOUT INTERPOLATION

3-level STATCOM with 72 IGBT (Mitsubishi Electric) Interpolated switching functions: how high can you get? 20 µs, 3 CPU with the controller 1000 time faster than conventional simulation software Actual diode/IGBT count: 10*6*3=180 Reference model In EMTP/RV (3us) vs Simulink/SPS/ RT-LAB (50 us) IPST 2009, Kyoto - Japan 49

RT-LAB XSG permits to use Xilinx System Generator models inside RT-LAB frame work  Enables complex model to run on the FPGA of RT-LAB Examples:  PMSM motor  IGBT inverter,  PWM modulator  Power electronics Simulation On Chip (FPGA)

No need to know VHDL language  But you need to know fixed-point arithmetic Real-life example: Rotary Variable Differential Transformer (RVDT) designed for Embraer in one week using XSG! Simulation On Chip (FPGA) A typical XSG model in RT-LAB

Simulation On Chip (FPGA) Example: PMSM Drive  PMSM drive built on FPGA using only XSG  PMSM, BLDC and FEA-Based PMSM  Include: test modulator, quad enc., resolver *C. Dufour et al. “Real-Time Simulation of Finite-Element Analysis Permanent Magnet Synchronous Machine Drives on a FPGA card”, Proceedings of 2007 European Conference on Power Electronics and Applications (EPE-07), Aalborg, Danemark, Sept 2007

Test sequencer  Test sequencer 53

Test sequencer: a key part of real-time simulator  Test sequencer requirement Capability to launch test automatically Capability to record and analyze data Capability to manage models  Use the full power of MATLAB and Python languages 54

Test sequencer: a key part of real-time simulator  Usage case: Monte-Carlo testing How to dimension correctly some power system component considering switching surges? 55

Test Automation with Python script 56 Test algorithm coded in Python Fault application and breaker reclosing are randomized

Test sequencer: a key part of real-time simulator By making automated randomized tests (Monte- Carlo), we can obtain probabilistic characteristics of overvoltages. 57

PHIL  Power Hardware-In-the-Loop 58

Power Hardware-In-The-Loop Tests (Ge2Lab, Grenoble) STATCOM may be require to provide voltage support in weak networks like in remote wind-farms  Can it withstand a fault? PU voltage dip

Power Hardware-In-The-Loop Integration (PHIL) In PHIL, there is an exchange of power between the real device under test and the simulated plant. A power amplifier is used to interface the real world device to the simulated one in this case. 60

Power Hardware-In-The-Loop Integration (PHIL) Using PHIL test, G2ELAB, Grenoble- INP, France, was able to study the stability of this wind- farm with a real STATCOM D. Ocnasu, S. Bacha, I. Munteanu, C. Dufour, D. Roye, “Real-Time Power-Hardware-In-the-Loop Facility for Shunt and Serial Power Electronics Benchmarking”, Proceedings of the 13th European Conference on Power Electronics and Applications (EPE-2009), Barcelona, Spain, Sept. 8-10, 2009

Example of PHIL testing (L2EP, Lilles) Distributed Energy Storage Systems Application Used for frequency control on islanded network Real power electronic device connected to a simulated grid! 62 H. Fakham, A. Doniec, F. Colas, X. Guillaud, “A Multi-agents System for a Distributed Power Management of Micro Turbine Generators Connected to a Grid”, Conference on Control Methodologies and Technologies for Energy Efficiency (CMTEE 2010) Vilamoura, Portugal

Frequency regulation tests  The higher the energy storage capacity, the lower the frequency deviation during fault 63 Impact of ultracapacitor-based DESS on the frequency response of an isolated power system after a major generation loss

Key References  University of Alberta Power Systems Laboratory based on RT-LAB L.-F. Pak, O. Faruque, X. Nie, V. Dinavahi, “A Versatile Cluster-Based Real- Time Digital Simulator for Power Engineering Research”, IEEE Transactions on Power Systems, Vol. 21, No. 2, pp , May  Power Hardware-In-The-Loop Testing of Grid Systems D. Ocnasu, S. Bacha, I. Munteanu, C. Dufour, D. Roye, “Real-Time Power- Hardware-In-the-Loop Facility for Shunt and Serial Power Electronics Benchmarking”, Proceedings of the 13th European Conference on Power Electronics and Applications (EPE-2009), Barcelona, Spain, Sept. 8-10, 2009  Advanced Motor Drive Simulation M. Harakawa, C. Dufour, S. Nishimura, T.Nagano, “Real-Time Simulation of a PMSM Drive in Faulty Modes with Validation Against an Actual Drive System”, Proceedings of the 13th European Conference on Power Electronics and Applications (EPE-2009), Barcelona, Spain, Sept. 8-10, 2009  RT-LAB application booklet with over 30 applications explained from motor drives and power electronics to large power systems.

Opal-RT Technologies 65 Opal-RT Partial Customer List

66 Opal-RT Clients involved in Electric Motor Drive and Power Grid Studies Ford

Please contact me if you have any questions 67

 Appendix 1: How to use RT-LAB for power system applications? 68

How to use RT-LAB for power system applications? 69  1- Design your model in Simulink and SimPowerSystems  2- Identify natural delay in your model (ex: transmission lines)  3- Make top-level groups in your Simulink model, these will be assigned to different CPUs of the simulator  4- Add I/O block in the model if necessary

How to use RT-LAB for power system applications? 70  1- Design your model in Simulink and SimPowerSystems We choose here a SPS demo named: power_PSS.mdl

How to use RT-LAB for power system applications? 71  2- Identify power line to make parallel distributed simulation

How to use RT-LAB for power system applications? 72  3- Choose a task separation and make Subsystems CPU #1 CPU #2

How to use RT-LAB for power system applications? 73  4- Some optimizations: put controllers in a separate CPU because it can run at slower rate  Also put monitoring in a separate subsystem Controls Monitoring

How to use RT-LAB for power system applications? 74  You can put your own ‘C’ code in any of the cores  You just have to use a S-function ‘wrapper’ int main() { printf("hello, world"); printf(“I want to do real-time simulations"); return 0; }

How to use RT-LAB for power system applications? 75  5- Adding I/Os  Let’s add an analog output from the RT-LAB library

How to use RT-LAB for power system applications? 76  Let’s output the Alternator Excitation voltage

How to use RT-LAB for power system applications? 77  The alternator excitation voltage can now be read on the front panel of the simulator

How to use RT-LAB for power system applications? 78  Most commercial I/O cards can be supported  Opal can supply the source code of communication driver examples to enable users to implement their own protocols through Ethernet for Internet