ECE Grande ECE 477 Design Review Team 3 - Fall 2008

Introduction Ashley Callaway Pat Doherty Nikeshia Ebron Leo Romanovsky Nikeshia Ebron Leo Romanovsky Ashley Callaway Pat Doherty

Outline Project overview Project-specific success criteria Block diagram Component selection rationale Packaging design Schematic and theory of operation PCB layout Software design/development status Project completion timeline Questions / discussion

Project Overview The ECE Grande is a digital poker game table. All personal player information is digitally stored The table will consist of 4 player stations Central community screen to display community information Web server to display the current game status on a remote computer

Project-Specific Success Criteria I. An ability to authenticate users using an RFID tag II. An ability to transmit/export the current game state via a TCP/IP connection III. An ability to display each player’s information on individual LCD screen and community information on a central screen.

PSSC – cont. IV. An ability to run a multi-player No-Limit Texas Hold’em game. V. An ability to interface with a distributed network of microcontrollers to control graphic LCDs and receive user input.

Block Diagram

Component Selection Rationale Master Microcontroller : MC9S12NE64 Embedded web server – TCP/IP protocol 80 I/O pins Alternative: PIC18/Rabbit Slave Microcontroller : MC9S12GC Same manufacturer as master 48 I/O pins SPI port for communication with master Alternative : PIC18

Component Selection Rationale RFID Reader An ability to turn antenna on and off Alternative : SparkFun LCDs Cost No negative voltages required for operation Alternative : negative voltage CrystalFontz

Package Design Dimensions 4ft wide (front); 6.5ft wide (back); 2.5ft (angled side); 2.16ft deep; 4in (height) 4in X 3in recessions for each player LCD covered by Lexan 41.5 lbs Material 2x4 Pressure Treated Lumber ¼” Plywood Standard Green Poker Felt Lexan Constraints Cost - $50.00

Packaging Design

Schematic/Theory of Operation Microcontroller Master (25MHz) Slave (16MHz) RFID 5V operation voltage 1 SCI Port and 1 GPIO Level Translator Tx0104 (3.3V – 5V) Ethernet Transformer RJ45 connected directly to microcontroller

LCD CrystalFontz CFAL12864L-Y-B2 3.3V operation voltage 90mA current draw Buttons Terminal Microswitch pushbuttons Send signals to slave microcontroller Will require 3 general I/O pins Schematic/Theory of Operation

Power Supply 9V wall wart Linear Regulators: (9V to 5V) and (9V to 3.3V) Headers LCD Push Buttons Level Translators

Schematic – Power and Control

Schematic – Master-Slave

Schematic - RFID

Schematic - Master

Schematic - Slave

PCB – Master Design Bypass Capacitor Kept close to power sources Located underneath Ethernet Adaptor Power Divided by operating voltages (5V right side – 3.3V left side)

PCB Layout - Master

PCB – Slave Design Bypass Capacitor Kept close to power sources Headers Placed around board edges for easy access

PCB Layout - Slave

Software Design/Development Status RFID development Drivers being written Poker Logic Algorithm Assigns a numeric score to a given passed in poker hand Hand will consist of 7 cards (2 in hand, 5 community cards), score will be given based on best 5 card combination in hand. Winners are determined by comparing players hand score. LCD Interfacing

Part Status Microcontroller (arrived) LCD (arrived) Ethernet Port (to be ordered) Crystals (to be ordered) Level Translator (arrived) Development board (arrived) RFID Reader & Tags (arrived)

Project Completion Timeline

Questions