XStream: Rapid Generation of Custom Processors for ASIC Designs Binu Mathew * ASIC: Application Specific Integrated Circuit

Logical Design is the Primary Cost Barrier in ASIC Design Logical Design Physical Design Fabrication SpecChip 15 months, 10 designers 2 months, 2 layout engineers 2 months, ASIC vendor’s fabrication facility 80% of cost20% of cost  Time to market is critical

The Business Opportunity  11,000 ASIC designs in year 2000 (DataQuest)  Average team: 10 designers, 15 months/design (Collett)  Design cost: $33B, mostly salaries  ECAE revenue forecast, 2004: $1.88B (Gartner)  Per person, per year, license  Volume royalties  Customisation and training contracts

The XStream Technology  Very high performance custom processors replace ASIC modules  Reduce design time for stream oriented ASIC modules by 95%  Retain 40-90% of ASIC performance  Software replaces hardware design  Software prototype already exists  Flexible, fast bug fixes, feature upgrades  Share chip across product family

Usage Scenario: MPEG Encoder

Software (C Benchmarks) Performance, area, power specifications XStream CAD Suite 3-10 HDL Option Cost/Benefit report Flexibility requirement

XStream: Unique Technology  Performance  Pattern accelerators  Do restricted domains extremely well  Fall back to traditional methods  Reactive Threads  Fast response to events like in custom circuits  Compiler controlled data flow  Mimics custom circuits  Power efficiency  Compiler controlled clock gating

Competitive Comparison Features Competitors ExamplesRapid Automated Generation Fast/ late cycle bug fix 10+ copies/ chip Low power ASIC level perform ance XStream ASIC + HDL Verilog, VHDL Programmable chips CPUs, FPGAs Domain specific chips Network processors GPUs: NVidia, ATI Custom CPUs Tensilica’s Xtensa, Coware’s LisaTek Easier DevelopmentBetter Performance

Summary  Reduce a large fraction of the $33B/year ASIC design cost:  Replace ASIC modules with XStream processor + Software  95% time savings for many ASIC modules  159x energy reduction compared to embedded CPUs  Flexibility  Easy to do bug fixes late in product cycle  Platform ASICs shared across product family

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Competitive Comparison Features Competitors ExamplesRapid Automated Generation Fast/ late cycle bug fix 10+ copies/ chip Low power ASIC level perform ance XStream  ASIC + HDL Verilog, VHDL  Programmable chips CPUs, FPGAs  Domain specific chips Network processors: Intel GPUs: NVidia, ATI  Custom CPUs Tensilica’s Xtensa, Coware’s LisaTek 

Usage Scenario – Showing Benefit  Reduce design time for stream oriented ASIC modules by 95%  Retain 40-90% of ASIC performance  159x energy advantage over general purpose processor  175% performance of high performance CPU

Back-up Slides  Data validating different claims

Competitive Comparison Features Competitors ExamplesRapid Automated Generation Fast/ late cycle bug fix 10+ copies/ chip Low power ASIC level perform ance XStream ASIC + HDL Verilog, VHDL Programmable chips CPUs, FPGAs Domain specific chips Network processors: Intel GPUs: NVidia, ATI Custom CPUs Tensilica’s Xtensa, Coware’s LisaTek

Usage Scenario: Camera Phone Camera MPEG Encoder User Interface CPU Wireless Module Control CPU Flash Memory Much more stuff Screen Antenna Much much more stuff System on Chip (SOC) Microphone Speaker