Lecture 1. Technology Trend Prof. Taeweon Suh Computer Science Education Korea University COM515 Advanced Computer Architecture.

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Presentation transcript:

Lecture 1. Technology Trend Prof. Taeweon Suh Computer Science Education Korea University COM515 Advanced Computer Architecture

Korea Univ Transistor Basics All semiconductor chips are collections and integrations of transistors Transistor is a three-ported voltage-controlled switch  Two of the ports are connected depending on the voltage on the third port  For example, in the switch below the two terminals (d and s) are connected (ON) only when the third terminal (g) is 1 2

Korea Univ Silicon 3 Transistors are built out of silicon, a semiconductor Silicon is not a conductor Doped silicon is a conductor –n-type (free negative charges, electrons) –p-type (free positive charges, holes) wafer

Korea Univ Periodic Table of the Elements 4

Korea Univ 5 MOS Transistors Metal oxide silicon (MOS) transistors: –Polysilicon (used to be Metal) gate –Oxide (silicon dioxide) insulator –Doped Silicon substrate and wells

Korea Univ 6 Top view Cross-section MOS Transistors

Korea Univ 7 MOS Transistors The MOS sandwich acts as a capacitor (two conductors with insulator between them) When voltage is applied to the gate, the opposite charge is attracted to the semiconductor on the other side of the insulator, which could form a channel of charge

Korea Univ 8 Transistors: nMOS Gate = 0, so it is OFF (no connection between source and drain) Gate = 1, so it is ON (connection between source and drain)

Korea Univ 9 Transistor Function

Korea Univ (Semiconductor) Technology Transistor is simply an on/off switch controlled by electricity IC (Integrated Circuit) combined dozens to hundreds of transistors into a single chip VLSI (Very Large Scale Integration) is used to describe the tremendous increase in the number of transistors in a chip (Semiconductor) Technology: How small can you make a transistor  0.1 µm (100nm), 90nm, 65nm, 45nm, 32nm technologies 10

Korea Univ 11 CMOS (Complementary MOS) nMOS transistors pass good 0’s, so connect source to GND pMOS transistors pass good 1’s, so connect source to V DD

Korea Univ 12 CMOS Gates: NOT Gate AP1N1Y 0ONOFF1 1 ON0 Layout (top view)

Korea Univ 13 CMOS Gates: NAND Gate ABP1P2N1N2Y 00ON OFF 1 01ONOFF ON1 10OFFON OFF1 11 ON 0 Layout

Korea Univ 14 Now, Let’s Make an Inverter Chip Core 2 Duo Your Inverter chip Yield means how many dies are working correctly after fabrication die

Korea Univ x86? What is x86?  Generic term referring to processors from Intel, AMD and VIA  Derived from the model numbers of the first few generations of processors: 8086, 80286, 80386,  x86  Now it generally refers to processors from Intel, AMD, and VIA x86-16: 16-bit processor x86-32 (aka IA32): 32-bit processor * IA: Intel Architecture x86-64: 64-bit processor Intel takes about 80% of the PC market and AMD takes about 20%  Apple also have been introducing Intel-based Mac from Nov * aka: also known as

Korea Univ x86 History (as of 2008) 16

Korea Univ x86 History (Cont.) bit (i386) 32-bit (i586) 64-bit (x86_64) 32-bit (i686) 8-bit16-bit4-bit Core i7 (Nehalem) 2 nd Gen. Core i7 (Sandy Bridge)

Korea Univ 18 Moore’s Law Transistor count will be doubled every 18 months Exponentialgrowth 2,250 42millions 1.7 billions Montecito

Korea Univ Feature Size (Technology) Trend 19

Korea Univ Power Dissipation 20 By early 2000, Intel and AMD made every effort to increase clock frequency to enhance the performance of their CPUs But, the power consumption is the problem P ≈ CV DD 2 f C: Capacitance VDD: Voltage f: Frequency

Korea Univ Power Density Trend 21 Source: Intel Corp.

Korea Univ Watch this! 22 Click the chip Slide from Prof H.H. Lee in Georgia Tech

Korea Univ How to Reduce Power Consumption? Reduce supply voltage with new technologies  i.e., reducing transistor size Keep the clock frequency in modest range  No longer increase the clock frequency Then… what would be the problem? So, the strategy is to integrate simple many CPUs in a chip 23 Performance Dual Core, Quad Core….

Korea Univ Reality Check, circa 200x Conventional processor designs run out of steam  Power wall (thermal)  Complexity (verification)  Physics (CMOS scaling) Unanimous direction  Multi-core  Simple cores (massive number)  Keep Wire communication on leash Gordon Moore happy (Moore’s Law)  Architects’ menace: kick the ball to the other side of the court? 24 Modified from Prof. Sean Lee in Georgia Tech

Korea Univ 25 Multi-core Processor Gala Prof. Sean Lee’s Slide in Georgia Tech

Korea Univ Intel’s Core 2 Duo 26 2 cores on one chip Two levels of caches (L1, L2) on chip 291 million transistors in 143 mm 2 with 65nm technology L2 Cache Core0Core1 Source: DL1 IL1

Korea Univ Intel’s Core i cores on one chip Three levels of caches (L1, L2, L3) on chip 731 million transistors in 263 mm 2 with 45nm technology

Korea Univ Intel’s Core i7 (2 nd Gen.) 28 2 nd Generation Core i7 995 million transistors in 216 mm 2 with 32nm technology L132 KB L2256 KB L38MB Sandy Bridge

Korea Univ AMD’s Opteron – Barcelona (2007) 29 4 cores on one chip 1.9GHz clock 65nm technology Three levels of caches (L1, L2, L3) on chip Integrated North Bridge

Korea Univ Intel Teraflops Research Chip 80 CPU cores Deliver more than 1 trillion floating-point operations per second (1 Teraflops) of performance 30 Introduced in September 2006

Korea Univ Intel’s 48 Core Processor 48 x86 cores manufactured with 45nm technology Nicknamed “single-chip cloud computer” 31 Debuted in December 2009

Korea Univ Tilera’s 100 cores (June 2011) Tilera has introduced a range of processors (64-bit Gx family: 36 cores, 64 cores and 100 cores), aiming to take on Intel in servers that handle high-throughput web applications  64-bit cores running up to 1.5GHz  Manufactured in 40nm technology 32 TILE Gx 3000 Series Overview

Korea Univ IBM Bluegene/Q Processor The Bluegene/Q processors will power the 20 petaflops Sequoia supercomputer being built by IBM for Lawrence Livermore National Labs. Bluegene/Q has 18 cores  First processor supporting hardware transactional memory  Each core is a 64-bit 4-way multithreaded PowerPC A2  16 cores are used for running actual computations; one will be used for running the operating system; the other is used to improve chip reliability  1.47 billion transistors  1.6 GHz 33 Bluegene/P Supercomputer in Argonne National Lab. IBM’s Bluegene/Q Processor (2011)

Korea Univ Performance If you edit your ms-word document on dual core, would it be running twice faster? The problem now is how to parallelize applications and efficiently use hardware resources (available cores)… If you were plowing a field, which would you rather use: Two strong oxen or 1024 chickens? - Seymour Cray (the father of supercomputing) 34 No ! Well, it is hard to say in Computing World

Korea Univ Focus on Computer Architecture 35 Computer Architecture Semiconductor Technology Programming Language Operating Systems Applications instruction set software hardware Virtualization Modified from Prof H.H. Lee’s slide in Georgia Tech Programming Model (ex: Transactional memory)

Korea Univ Changing Definition 50s to 60s: Computer Architecture ~ Computer Arithmetic 70s to mid 80s: Instruction Set Design, especially ISA appropriate for compilers 90s: Speculation: Predict this, predict that; memory system; I/O system; Multiprocessors; Networks 2000s: Power efficiency, Communication, On-die Interconnection Network, Multi-this, Multi-that. 2010s and beyond: Thousand-core processors, Self adapting systems? Self organizing structures? DNA Systems/Quantum Computing? 36 Slide from Prof H.H. Lee’s in Georgia Tech

Korea Univ Presentation Task :  Presenting a paper published not before 2010  Read as much papers as needed to understand the paper  Propose and idea to improve the paper Time : two weeks before end of semester Each student will be given 20 Min to present the paper and his idea Papers must be journal paper of reliable publishers. 37

Korea Univ A brief introduction about papers Types  Journals papers  Conference papers Famous indexing  Scopus (Elsevier)  ISI (Institute for Scientific Information)Institute for Scientific Information Impact factor  Calculated by ISI (Thomson Reuters) JCR Journal Citation Reports (JCR)  is an annual publication by the Healthcare & Science division of Thomson Reuters. It has been integrated with the Web of Knowledge, by Thomson Reuters, and is accessed from the Web of Science to JCR Web.annual publicationThomson ReutersWeb of KnowledgeWeb of Science 38

Korea Univ Reliable publishers Nature ( Science Magazine ( IEEE ( Elsevier ( Springer ( Taylor & Francis ( Hindawi ( 39