Near-Infrared Detector Arrays - The State of the Art - Klaus W. Hodapp Institute for Astronomy University of Hawaii

Historic Milestones 1800: Infrared radiation discovered (Herschel with his thermometers) 1960s and 70s: Single detectors (PbS, InSb …) 1980s: First infrared arrays (322, 5862, 642, 1282) 1990: NICMOS-3 (2.5m PACE-1 HgCdTe) 1991: SBRC 2562 (InSb) 1994: HAWAII-1 (2.5m PACE-1 HgCdTe) 1995: Aladdin (InSb) 2000: HAWAII-2 (2.5m PACE-1 HgCdTe) 2002: HAWAII-1RG (5.0μm MBE HgCdTe) 2002: HAWAII-2RG (5.0μm MBE HgCdTe) 2002: RIO 2K×2K NGST InSb 2009: HAWAII-4RG NSF grant (last week)

Materials for Infrared Detectors

Temperature and Wavelengths of High Performance Detector Materials Si:As IBC Si PIN InGaAs SWIR HgCdTe LWIR HgCdTe MWIR HgCdTe InSb Approximate detector temperatures for dark currents << 1 e-/sec

Collection of High-Performance CMOS Detectors 3D stacked CMOS wafer sandbox HgCdTe 2K x 2K, 20 µm pixels InSb 2K x 2K, 25 µm pixels HgCdTe 4K x 4K mosaic, 18 µm pixels HgCdTe 2K x 2K, 18 µm pixels Monolithic CMOS 4K x 4K, 5 µm pixels

NICMOS PICNIC HAWAII HAWAII-2RG Hawaii-2RG Heritage All Successfully Developed on 1st Design Pass NICMOS PICNIC HAWAII 1987 1990 1994 1994 1998 2000 -2 -1 4.2 million pixels >13 million FETs Expect CDS <10e- 16,384 pixels 70,000 FETs CDS: <50e- 65,536 pixels 250,000 FETs CDS: <30e- -1R 65,536 pixels 250,000 FETs CDS: <20e- 1.05 million pixels >3.4 million FETs CDS: <10e- CDS: <TBD e- HAWAII-2RG Exploiting Many Lessons Learned to Minimize Development Risk And Enable Next Generation Performance Transition to 0.25µm CMOS With Full Wafer Stitching and Low-Power System-on-Chip ASIC

Infrared Arrays Diode Array Multiplexer Readout Electronics

Electric Field in a CCD 1. The n-type layer contains an excess of electrons that diffuse into the p-layer. The p-layer contains an excess of holes that diffuse into the n-layer. This structure is identical to that of a diode junction. The diffusion creates a charge imbalance and induces an internal electric field. The electric potential reaches a maximum just inside the n-layer, and it is here that any photo-generated electrons will collect. All science CCDs have this junction structure, known as a ‘Buried Channel’. It has the advantage of keeping the photo-electrons confined away from the surface of the CCD where they could become trapped. It also reduces the amount of thermally generated noise (dark current). Electric potential Electric potential n p Potential along this line shown in graph above. Cross section through the thickness of the CCD

NIR Photodiode Array Technologies Problems: Substrate availability Thermal expansion match to Si Lattice match to detector material LPE HgCdTe on Sapphire (PACE-1): Rockwell, CdTe buffer MBE HgCdTe on CdZnTe: Rockwell, thin or substrate removed, AR coated InSb (Raytheon): Bulk material, p-on-n, thinned, AR coated LPE HgCdTe on CdZnTe: Raytheon, thick MBE HgCdTe on Si: Raytheon, ZnTe and CdTe buffer, thick, thin in future

Reset-Read Sampling 0.5 V Diode Bias Voltage 0 V Time Reset Open Shutter Close Shutter 0.5 V Reset Reset Diode Bias Voltage kTC Noise Reset-Read Sampling Readout 0 V Time

Recharge Noise in Capacitors Energy stored in a capacitor: E = ½ Q²/C Noise Energy must be: E_n = ½kT Noise Charge: ½ (Q_n)²/C = ½kT (Q_n)² = kTC Q_n = √ kTC

Example: Capacitance: 50 fF, T=37 K k = 1.38 e-23 J/K Q_n = √ kTC Q_n = 5 e-18 C With q_e = 1.6 e-19 C Q_n = 32 electrons rms

Double Correlated Sampling Open Shutter Close Shutter kTC noise 0.5 V Reset Reset Readout Diode Bias Voltage CDS Signal Double Correlated Sampling Readout 0 V Time

Fowler (multi) Sampling Open Shutter Close Shutter kTC noise 0.5 V Reset Reset Readout Diode Bias Voltage MCS Signal Fowler (multi) Sampling Readout 0 V Time

Up-the-Ramp Sampling 0.5 V Diode Bias Voltage 0 V Time Reset Open Shutter Close Shutter kTC noise 0.5 V Reset Reset Diode Bias Voltage MCS Signal Up-the-ramp Readout Up-the-Ramp Sampling 0 V Time

External JFETs optimized

HAWAII-1 Rockwell Science Center 10241024 2.5m HgCdTe detector array 4 Quadrant architecture 4 Output amplifiers 18.5 m pixels LPE HgCdTe on sapphire (PACE-1) Use of external JFETs possible Available for purchase

HAWAII-1 Focal Plane Array

HAWAII-1 Quantum efficiency (50% - 60%) Dark current 0.01 e-/s (65K) Read noise about 10 - 15 e- rms CDS Residual image effect Some multiplexer glow Fringing

3600 s 128 samp T= 65K

Internal FETs

External JFETs optimized

Fringing in PACE-1 material

1997 1998 Residual Images in PACE-1 HAWAII-1 Arrays

Aladdin Raytheon Center for Infrared Excellence 10241024 InSb detector array 4 Quadrant architecture 32 Output amplifiers 27 m pixels Thinned, AR coated InSb Three generations of multiplexers “Foundry Run” distribution mode

Aladdin Quantum efficiency high (80% - 90%) Dark current 0.2 - 1.0 e-/s Read noise about 40 e- rms CDS Charge capacity 200,000 e- Residual image effect No amplifier glow

Aladdin frame taken with SPEX (J. Rayner)

NIRI Aladdin Image of AFGL2591

HAWAII-2 Rockwell Science Center 20482048 2.5m HgCdTe detector array 4 Quadrant architecture 32 Output amplifiers 3 Output modes available 18.0 m pixels Use of external JFETs possible Reference signal channel

Continuing to Aggressively Use CMOS 5 Designs in 0.25µm 3.3/1.8V 0.18µm CMOS underway for ProCam-2 Also migrating to 0.13µm on newest programs to boost performance via Cu and low-k interlayer dielectrics After Isaac (1999)

20482 Readout Provides Low Read Noise for Visible and MWIR HAWAII-2: Photolithographically Abut 4 CMOS Reticles to Produce Each 20482 ROIC Twelve 20482 ROICs per 8” Wafer 20482 Readout Provides Low Read Noise for Visible and MWIR

HAWAII-2 Reference Signal

New Developments Multiplexers: Detector Materials: HAWAII-1R HAWAII-1RG HAWAII-2RG Abuttable 2K2K RIO developments Detector Materials: MBE HgCdTe on CdZnTe MBE HgCdTe on Si Cutoff wavelength Thinning Substrate removal AR coating

RSC Approach H A W A I I - 2 R G HgCdTe Astronomy Wide Area Infrared Imager with 2k2 Resolution, Reference pixels and Guide Mode HgCdTe detector substrate removed to achieve 0.6 µm sensitivity Specifically designed multiplexer highly flexible reset and readout options optimized for low power and low glow operation three-side close buttable Two-chip imaging system: MUX + ASIC convenient operation with small number of clocks/signals lower power, less noise

HAWAII-2RG: UMC 0.25µm CMOS 3.3/2.5V Process on Epi Wafers 1 Poly/4- or 5-Metal 65/33Å Oxide Low, Normal and High Threshold Voltage Options MIM (Analog) Capacitor 22 mm by 22 mm Stepper Field Full Intra-Reticle Stitching One Mask Set Comprising Modular Blocks to Photocompose Each CMOS Multiplexer on 200 mm Wafers

NGST Multiplexer Overview 2048 x 2048 resolution with 18 µm square pixels True stitched design (electrical connections across stitching lines) Close buttable die : - 2.5 mm mux overlap on top (pad) side - 1 mm mux overlap on each side  gap  2 mm) 1, 4, or 32 output mode selectable Slow mode (100 kHz) and fast mode (5 MHz with additional column buffers) selectable, both usable with internal and external buffers NGST

3-D Barrier to Prevent Glow from Reaching the Detector

Prototype 2×2 Mosaic for NGST

Ground-Based Camera Projects 2K*2K IR Arrays IfA ULB UKIRT WFC CFHT WIRCAM Gemini GSAOI ESO VISTA Keck KIRMOS

Detailed HAWAII-2RG Descriptions

Block Diagram All pads located on one side (top) Approx. 110 doubled I/O pads (probing and bonding) Three-side close buttable 18 µm pixels Total dimensions: 39 x 40.5 mm²

Doubled Bus Structure Old HAWAII-1/2 architecture: Discharge of the column bus results in a significant drop of the output signal when switching from one pixel to the next.  longer settling time  higher power consumption due to the charging of the external load Improvement: Doubling of the horizontal bus structure Use bus A and bus B alternately While one bus is connected to the output, use the other one for precharging the next column bus Simulation of analog signal chain including double bus structure (next slide).

Fast scan direction individually selectable for each subblock Output Options Slow scan direction selectable Single output for all 2048 x 2048 pixels (guide mode always uses single output) Fast scan direction selectable Single Output Mode default scan directions Fast scan direction individually selectable for each subblock Separate output for each subblock of 512 x 2048 pixels Slow scan direction selectable 4 Output Mode default scan directions

Output Options (2) 32 Output Mode Separate output for each subblock of Slow scan direction selectable 32 Output Mode Separate output for each subblock of 64 x 2048 pixels Four different patterns for fast scan direction selectable default scan directions

Support of Full Field and Guide Mode with Low Risk Guide mode (tracking of a guide star) is required to keep the orientation of the telescope constant with respect to the observed object. Guide mode requires the readout of a small subarray (variable size, arbitrarily located) at a high frame rate It is highly desirable not to lose the rest of the guide FPA for full field integration Parallel (interleaved) readout of guide data and full field data Guide window can be reset while the remaining pixels keep integrating (also allows individual reset of bright objects during long integrations) Provides redundancy for science operation in case full field mode fails Multiplexer Approach: Use independent shift registers for normal mode and guide mode Use reset scheme which allows individual pixel reset

Guide Mode Shift Register (Window Mode) Additional MUX and AND - gate in each register cell Decoder for selection of start and stop position Stop Address Start Address Qpre Start & n-1 MUX D Q Row n FF n C start decoder Set start address to n+1 & n Selection of row n+1 MUX D Q Row n+1 FF C stop decoder n+1 & n+1 MUX D Q Selection of row n+2 Row n+2 FF C n+2 Clk Qout

Interleaved readout of full field and guide window FPA Switching between full field and guide window is possible at any time  any desired interleaved readout pattern can be realized Three examples for interleaved readout: Full field 1. Read guide window after reading part of the full field row 2. Read guide window after reading one full field row Guide window 3. Read guide window after reading two or more full field rows

Reset Schemes

Serial Interface Three-wire serial interface allows to program the multiplexer: choose start/stop addresses for guide window select different operation and test modes Interface lines can be shared with shift register clock lines CS SCLK SDATA Bit 15 Bit 14 Bit 13 Bit 12 Bit 0

Major FPA Components Shortwave Focal Plane Array Detector Mask 4 2Kx2K Sensor Chip Assemblies on Molybdenum Mounts Flex Cables Interface Plates Mosaic Baseplate Titanium Flexures Interface Baseplate GSE Handles Items in Blue are provided by Arizona Sensor chip assemblies are provided by RSC. Longwave architecture similar but simpler (only one SCA). Shortwave Focal Plane Array

FPA Housings in NIRCam LW FPAs and Housings Module A Module B SW FPAs and Housings *OBA Struts and Brackets not shown