Makefiles CISC/QCSE 810

BeamApp and Tests in C++ 5 source code files After any modification, changed source needs to be recompiled all object files need to be relinked Changing debug, profiling settings all source needs to be recompiled, relinked

At command line # Compile all source g++ -c *.cpp # try to link all objects g++ *.o –o BeamApp

Obvious limitations Have to manually type in flags Will recompile everything every time Tries to include all objects in one big program have multiple "main" functions each program needs only some objects

Makefiles Some of the earlier problems can be worked around with directories, organizing files Simply better, though, to use some version of 'make' with a 'makefile' "A makefile is a collection of instructions that should be used to compile your program."

Non-obvious advantage Makefiles make it easier for you to recompile your code They also make it easier for others to recompile your code Build process for many libraries is  download and unzip ./configure  make  make test  make install If you ever want to package up C, C++, Fortran, include a makefile

Using make Some things we would like our makefile to handle make BeamApp make clean make solver_Test make all make install Also, change compiler flags for debug, optimization, and profiling

Makefile structure - variables Variable definitions CFLAGS= -g # compiler flags CC=gcc # set C compiler name CPP=g++ # set C++ compiler name

Makefile structure - rules Rules are of the form :  commands Note at the start of each command line BeamApp: BeamApp.o solver.o Beam.o $(CPP) $(LFLAGS) BeamApp.o solver.o Beam.o \ –o BeamApp BeamApp.o: BeamApp.cpp $(CPP) –c $(CFLAGS) BeamApp.cpp

Common rules Many object compilations follow the same basic rule form: BeamApp.o: BeamApp.cpp $(CPP) –c $(CFLAGS) BeamApp.cpp Makefiles can do this everytime with pattern rules: %.o : %.cpp $(CPP) -c $(CFLAGS) $< -o (Also see old-fashioned 'pattern rules' in some makefiles)

Make clean Customary target for make deletes any object files, executables, in preparation for a completely 'clean' rebuild clean: rm *.o *.exe Sometimes has error message; see more sophisticated ways on web Ensure it is not first in make file 'make' on its own triggers first target in makefile

Rule order make uses explicit rules, if present, over general rules BeamApp.o is in makefile, so it compiles it according to specific instruction Only other object files, without explicit targets, are compiled using %.o rule Order does matter in some cases, so be wary true for any rule-based system with potential conflicts

Make solver_Test solver_Test: solver.o solver_Test.o $(CPP) $(LFLAGS) solver.o solver_Test.o -o solver_Test; If we want to run the test as part of the build, solver_Test: solver.o solver_Test.o $(CPP) $(LFLAGS) solver.o solver_Test.o -o solver_Test;./solver_Test For test routines, might want to force rebuild: add dependency on 'clean'

Make all Common target 'all' usually builds all related programs or libraries all: BeamApp solver_Test

Compiler Options -Wall – all warnings -g – debug (so program works with gdb or other debugger) -O# - optimize the code (free speed!) -O3 most common for final production code Takes longer to compile Can introduce errors! Solution? Nothing magical; best improvements are better code -pg – include profiler information

Make install Often, if you have a program or library you're rebuilding, you need to move the final product elsewhere MATLAB library path bin directory for executables 'make install' is usually used for this install: BeamApp cp BeamApp ~/bin

Setting Variables Can change variables in makefile, then recompile CFLAGS=-g -Wall Can also override makefile variables at command line make CFLAGS=-O3 all or export CFLAGS=-O2 make –e all

Make Variants Some variants include: CMake, by Kitware Jam, by Perforce Qmake, by Trolltech Main benefits are portability between OSes, compilers automation of makefile creation

Resources Gnu makefile conventions and style Conventions.html