Writing an Embedded Controller. It usually consists of two parts – Initialization – A main loop More challenging than HW3 because HW3 is stateless, the.

Slides:



Advertisements
Similar presentations
Catch up on previous topics Summary and putting together first four classes.
Advertisements

1 Lecture 3: MIPS Instruction Set Today’s topic:  More MIPS instructions  Procedure call/return Reminder: Assignment 1 is on the class web-page (due.
Branches Two branch instructions:
Slides revised 3/25/2014 by Patrick Kelley. 2 Procedures Unlike other branching structures (loops, etc.) a Procedure has to return to where it was called.
CDA 3100 Recitation Week 15. What does the function f1 do:.data A:.word 10,21,45,8,100,15,29,12,3,19 B:.word 2,5,33,5,20,1,53,52,5,5 C:.word 6,8,5,4,5,22,53,12,33,89.text.globl.
1 Procedure Calls, Linking & Launching Applications Lecture 15 Digital Design and Computer Architecture Harris & Harris Morgan Kaufmann / Elsevier, 2007.
Solution 2nd Exam.
The University of Adelaide, School of Computer Science
SPIM and MIPS programming
Some Samples of MIPS Assembly Language Lecture for CPSC 5155 Edward Bosworth, Ph.D. Computer Science Department Columbus State University.
MIPS Function Continued
1 Nested Procedures Procedures that don't call others are called leaf procedures, procedures that call others are called nested procedures. Problems may.
PCSpim Introduction. Register contentProgramMemory contentMessage.
The University of Adelaide, School of Computer Science
.text fact: addiu $sp, $sp, -32 sw $ra, 20($sp) sw $fp, 16($sp) addiu $fp, $sp, 28 sw $a0, 0($fp) bgtz $a0, L2 li $v0, 1 b suffix L2: addi $a0, $a0,
Writing an Embedded Controller. It usually consists of two parts – Initialization – A main loop Experience: – The main loop usually has to deal with many.
Datorteknik IOControl bild 1 Input/Output Interface Address bus Data bus Control bus fffffffc Addr DE...Mem 1 Keyboard address decoder Mem n address decoder.
MIPS Coding. Exercise – the bubble sort 5/8/2015week04-3.ppt2.
MIPS Assembly Language I Computer Architecture CPSC 321 Andreas Klappenecker.
Computer Structure - The Instruction Set (2) Goal: Implement Functions in Assembly  When executing a procedure (function in C) the program must follow.
Lecture 7: MIPS Instruction Set Today’s topic –Procedure call/return –Large constants Reminders –Homework #2 posted, due 9/17/
Writing an Embedded Controller. It usually consists of two parts – Initialization – A main loop More challenging than HW3 because HW3 is stateless, the.
MIPS I/O and Interrupt. SPIM I/O and MIPS Interrupts The materials of this lecture can be found in A7-A8 (3 rd Edition) and B7-B8 (4 th Edition).
COMP201 Computer Systems Exceptions and Interrupts.
Input and Output Computer Organization and Assembly Language: Module 9.
HW #1 Problems & Industrial Strength Assembly CSCI 136.
MIPS function continued. Recursive functions So far, we have seen how to write – A simple function – A simple function that have to use the stack to save.
MIPS I/O and Interrupt. .data val1:.float 0.6 val2:.float 0.8 msg_done:.asciiz "done\n".text.globl main main: li.s $f0, mfc1 $a0, $f0 jal calsqrt.
In Class Execise. .data A:.word 0,1,2,3,4,5,6,7,8,9.text.globl main main: la $a0,A li $a1,6 li $a2,5 jal onUpStream done: li $v0, 10# exit syscall onUpStream:
Procedure Basics Computer Organization I 1 October 2009 © McQuain, Feng & Ribbens Procedure Support From previous study of high-level languages,
April 23, 2001Systems Architecture I1 Systems Architecture I (CS ) Lecture 9: Assemblers, Linkers, and Loaders * Jeremy R. Johnson Mon. April 23,
Runtime Stack Computer Organization I 1 November 2009 © McQuain, Feng & Ribbens MIPS Memory Organization In addition to memory for static.
MIPS coding. Review Shifting – Shift Left Logical (sll) – Shift Right Logical (srl) – Moves all of the bits to the left/right and fills in gap with 0’s.
MIPS I/O and Interrupt.
HW4. A TV controller Let’s use this lecture to start to develop a simple TV controller together.
Chapter 2 — Instructions: Language of the Computer — 1 Conditional Operations Branch to a labeled instruction if a condition is true – Otherwise, continue.
Interrupts and Exception Handling. Execution We are quite aware of the Fetch, Execute process of the control unit of the CPU –Fetch and instruction as.
CPEG323 Homework Review I Long Chen October, 17 th, 2005.
Exceptions and Interrupts ◆ Breakpoints, arithmetic overflow, traps, and interrupts are all classified as exceptions. ◆ An exception is an event that requires.
MIPS Assembly Language Programming
Computer System Structures
Writing an Embedded Controller
MIPS I/O and Interrupt.
the Operating System (OS)
MIPS Procedures.
Lecture 4: MIPS Instruction Set
Input/Output Interface
MIPS I/O and Interrupt.
MIPS I/O and Interrupt.
MIPS Procedures.
Addressing in Jumps jump j Label go to Label op address 2 address
Solutions Chapter 2.
MIPS Functions.
MIPS Instructions.
MIPS Functions.
MIPS Functions.
MIPS coding.
addi sp, sp, -4 sw r9, 0(sp) sw r9, -4(sp)
MIPS Procedures.
Review.
MIPS function continued
Interrupts and Exception Handling
MIPS Functions.
MIPS I/O and Interrupt.
Writing an Embedded Controller
MIPS Functions.
HW4.
Interrupts and Exception Handling
MIPS function continued
MIPS Functions.
Presentation transcript:

Writing an Embedded Controller

It usually consists of two parts – Initialization – A main loop More challenging than HW3 because HW3 is stateless, the microcontroller has states. Experience: – The main loop usually has to deal with many things. It is important NOT to stay in any job for too long. You should process an event and almost immediately return to the main loop.

A Simple Program to Get Started Write a program which – Prints out “TV is working” every 3 seconds – Print out the ASCII of any key you have pressed immediately.

Two Jobs The simple program has two jobs: 1.A periodical job executed every 3 seconds 2.A job to process the input Note: – Cannot sleep for 3 seconds and then print out the sentence because cannot process the input while sleeping – Must make sure that each iteration of the main loop is short, such that you can check at a fine time granularity if need to print status Has new keyboard input

The code should look like loop: if key pressed print ascii value if 3 sec timer expires print msg goto loop

.kdata# kernel data s1:.word 10 s2:.word 11 new_line:.asciiz "\n" msg_tvworking:.asciiz "TV is working\n".text.globl main main:mfc0 $a0, $12# read from the status register ori $a0, 0xff11# enable all interrupts mtc0 $a0, $12# write back to the status register lui $t0, 0xFFFF# $t0 = 0xFFFF0000; ori $a0, $0, 2# enable keyboard interrupt sw $a0, 0($t0)# write back to 0xFFFF0000; li $s0, 300# li $s6, 10000# $s6 used to pass the ascii code li $s7, 10000# a large number impossible to be an ascii code loop: beq $s6, $s7, mainloopnext1 ori $a0, $s6, 0 li $v0,1# print it here. syscall li $v0,4# print the new line la $a0, new_line syscall li $s6, 10000# $s0 used to pass the ascii code mainloopnext1: addi $s0, $s0, -1 bne $s0, $0, mainloopnext4 li $s0, 300 la $a0, msg_tvworking li $v0, 4 syscall mainloopnext4: jal delay_10ms j loop li $v0, 10# exit,if it ever comes here syscall delay_10ms: li $t0, 3000 delay_10ms_loop: addi $t0, $t0, -1 bne $t0, $0, delay_10ms_loop jr $ra.ktext 0x # kernel code starts here sw $v0, s1# We need to use these registers sw $a0, s2# not using the stack because the interrupt might be # triggered by a memory reference # using a bad value of the stack pointer mfc0 $k0, $13# Cause register srl $a0, $k0, 2# Extract ExcCode Field andi $a0, $a0, 0x1f bne $a0, $zero, kdone# Exception Code 0 is I/O. Only processing I/O here lui $v0, 0xFFFF# $t0 = 0xFFFF0000; lw $s6, 4($v0)# get the input key kdone:lw $v0, s1# Restore other registers lw $a0, s2 mtc0 $0, $13# Clear Cause register mfc0 $k0, $12# Set Status register andi $k0, 0xfffd# clear EXL bit ori $k0, 0x11# Interrupts enabled mtc0 $k0, $12# write back to status eret# return to EPC

A Slightly More Advanced Version Write a process_input function that responds to `m’, `h’, `q’ (ascii code 109, 104, 112, respectively). Basically, The TV is initially not in the ``menu state.’’ When the user presses `m’ while the TV is not in the menu state, the TV should show a very simple menu, and enters the menu state: – “`h' to print hello, `q' to quit.” In the menu state, – if the user presses `h’, print out “Hello!” – if the user presses `q’, print out “quit” and quits the menu state. If not in the menu state, – the TV does not respond to `h’ and `q’.

The Challenge How do you know whether to respond to ‘h’ or ‘q’ or not? – Should not respond in the normal state – Should respond under menu A naïve way is to write a process_input function that – Called when ‘m’ is pressed then waits there for ‘h’ and ‘q’ – Problem?

The solution Maintain a global variable to remember if we are in the menu state Write the process_input function by checking the variable first

The code # kdata# kernel data s1:.word 10 s2:.word 11 # data menuLevel:.word 0 msg_tvworking:.asciiz "tv is working\n" msg_menu:.asciiz "`h' to print hello, `q' to quit.\n" msg_hello:.asciiz "hello!\n" msg_quit:.asciiz "quit.\n" # text.globl main main:mfc0 $a0, $12# read from the status register ori $a0, 0xff11# enable all interrupts mtc0 $a0, $12# write back to the status register lui $t0, 0xFFFF# $t0 = 0xFFFF0000; ori $a0, $0, 2# enable keyboard interrupt sw $a0, 0($t0)# write back to 0xFFFF0000; li $s0, 300# li $s6, 10000# $s6 used to pass the ascii code li $s7, 10000# a large number impossible to be an ascii code mainloop: # 1. read keyboard input, and process it beq $s6, $s7, mainloopnext1 ori $a0, $s6, 0 li $s6, 10000# $s0 used to pass the ascii code jal process_input mainloopnext1: addi $s0, $s0, -1 bne $s0, $0, mainloop li $v0, 4 la $a0, msg_tvworking syscall addi $s0, $0, 300 jal delay_10ms j mainloop li $v0,10 # exit syscall # delay_10ms: li $t0, 1000 delay_10ms_loop: addi $t0, $t0, -1 beq $t0, $0, delay_10ms_done j delay_10ms_loop delay_10ms_done: jr $ra # process_input: la $t0, menuLevel lw $t1, 0($t0) bne $t1, $0, pi_menu_L_1 li $t0, 109 # comparing with the ascii of `m' bne $a0, $t0, process_input_done la $t0, menuLevel li $t1, 1 sw $t1, 0($t0) la $a0, msg_menu li $v0, 4 syscall j process_input_done pi_menu_L_1: li $t0, 104 # comparing with the ascii of `h' bne $a0, $t0, pi_menu_L_1_comp_q # la $a0, msg_hello li $v0, 4 syscall j process_input_done pi_menu_L_1_comp_q: li $t0, 113 # comparing with the ascii of `q' bne $a0, $t0, process_input_done # la $a0, msg_quit li $v0, 4 syscall la $t0, menuLevel sw $0, 0($t0) j process_input_done process_input_done: jr $ra # ktext 0x # kernel code starts here sw $v0, s1# We need to use these registers sw $a0, s2# not using the stack because the interrupt might be # triggered by a memory reference # using a bad value of the stack pointer mfc0 $k0, $13# Cause register srl $a0, $k0, 2# Extract ExcCode Field andi $a0, $a0, 0x1f bne $a0, $zero, kdone# Exception Code 0 is I/O. Only processing I/O here lui $v0, 0xFFFF# $t0 = 0xFFFF0000; lw $s6, 4($v0)# get the input key kdone:lw $v0, s1# Restore other registers lw $a0, s2 mtc0 $0, $13# Clear Cause register mfc0 $k0, $12# Set Status register andi $k0, 0xfffd# clear EXL bit ori $k0, 0x11# Interrupts enabled mtc0 $k0, $12# write back to status eret# return to EPC #