Domain Specific Model Computation Using a Lattice of Coalgebras Jennifer Streb, Garrin Kimmell, Nicolas Frisby, and Perry Alexander The University of Kansas.

Slides:



Advertisements
Similar presentations
Reconfigurable Computing After a Decade: A New Perspective and Challenges For Hardware-Software Co-Design and Development Tirumale K Ramesh, Ph.D. Boeing.
Advertisements

SOC Design: From System to Transistor
The need for AMS assertions Verify the analog/digital interfaces at block and SoC levels –Check properties involving voltages and currents –Check complex.
ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2004 Serdar Taşıran.
VHDL - I 1 Digital Systems. 2 «The designer’s guide to VHDL» Peter J. Andersen Morgan Kaufman Publisher Bring laptop with installed Xilinx.
A Logical Viewpoint on Architectures
CSE 341 Verilog HDL An Introduction. Hardware Specification Languages Verilog  Similar syntax to C  Commonly used in  Industry (USA & Japan) VHDL 
Introduction to Digital Electronics. Suplementary Reading Digital Design by - John F. Wakerly – - you will find some solutions at this site.
EELE 367 – Logic Design Module 2 – Modern Digital Design Flow Agenda 1.History of Digital Design Approach 2.HDLs 3.Design Abstraction 4.Modern Design Steps.
Presented by: Thabet Kacem Spring Outline Contributions Introduction Proposed Approach Related Work Reconception of ADLs XTEAM Tool Chain Discussion.
1 Basic abstract interpretation theory. 2 The general idea §a semantics l any definition style, from a denotational definition to a detailed interpreter.
The University of Kansas Information and Telecommunications Technology Center Engineering of Computer-Based Systems Dr. Perry Alexander Associate Professor.
Behavioral Design Outline –Design Specification –Behavioral Design –Behavioral Specification –Hardware Description Languages –Behavioral Simulation –Behavioral.
Review of “Embedded Software” by E.A. Lee Katherine Barrow Vladimir Jakobac.
1 Software Architecture: a Roadmap David Garlen Roshanak Roshandel Yulong Liu.
Power Efficient Rapid System Prototyping Using CoDeL: The 2D DWT Using Lifting Nainesh Agarwal & Nikitas Dimopoulos University of Victoria, Canada PacRim,
The Gigascale Silicon Research Center Edward A. Lee UC Berkeley The GSRC Semantics Project Tom Henzinger Luciano Lavagno Edward Lee Alberto Sangiovanni-Vincentelli.
NSF Foundations of Hybrid and Embedded Software Systems UC Berkeley: Chess Vanderbilt University: ISIS University of Memphis: MSI A New System Science.
1 Systematic Domain Design Some Remarks. 2 Best (Conservative) interpretation abstract representation Set of states concretization Abstract semantics.
VHDL-AMS VHDL-Analog and Mixed Signal Extensions.
Using the Vanderbilt Generic Modeling Environment (GME) to Address SOA QoS Sumant Tambe Graduate Intern, Applied Research, Telcordia Technologies Inc.
Rosetta Functional Specification Domains Perry Alexander EECS Department / ITTC The University of Kanasas.
1 Chapter 7 Design Implementation. 2 Overview 3 Main Steps of an FPGA Design ’ s Implementation Design architecture Defining the structure, interface.
Formal Verification of SpecC Programs using Predicate Abstraction Himanshu Jain Daniel Kroening Edmund Clarke Carnegie Mellon University.
1 System-Level Description Languages Andrew Mihal EE249 Fall 1999 Project Presentation 4 December 1999.
Digital System Design EEE344 Lecture 1 INTRODUCTION TO THE COURSE
(1) Introduction © Sudhakar Yalamanchili, Georgia Institute of Technology, 2006.
1  Staunstrup and Wolf Ed. “Hardware Software codesign: principles and practice”, Kluwer Publication, 1997  Gajski, Vahid, Narayan and Gong, “Specification,
Web-based design Flávio Rech Wagner UFRGS, Porto Alegre, Brazil SBCCI, Manaus, 24/09/00 Informática UFRGS.
CSET 4650 Field Programmable Logic Devices
Katanosh Morovat.   This concept is a formal approach for identifying the rules that encapsulate the structure, constraint, and control of the operation.
VHDL Structured Logic Design School of Electrical Engineering University of Belgrade Department of Computer Engineering Ivan Dugic Veljko.
Introduction to Digital Design
Chap. 1 Overview of Digital Design with Verilog. 2 Overview of Digital Design with Verilog HDL Evolution of computer aided digital circuit design Emergence.
CAD Techniques for IP-Based and System-On-Chip Designs Allen C.-H. Wu Department of Computer Science Tsing Hua University Hsinchu, Taiwan, R.O.C {
1 Iterative Program Analysis Abstract Interpretation Mooly Sagiv Tel Aviv University Textbook:
Benjamin Gamble. What is Time?  Can mean many different things to a computer Dynamic Equation Variable System State 2.
Studio Session 1: Introduction to VHDL and related Tools EE19D – 25/01/2005.
© 2012 xtUML.org Bill Chown – Mentor Graphics Model Driven Engineering.
Languages for HW and SW Development Ondrej Cevan.
ECE 8443 – Pattern Recognition ECE 3163 – Signals and Systems Objectives: Definition of a System Examples Causality Linearity Time Invariance Resources:
Rosetta Study Group Report IEEE DASC. 1. Broad market potential Applications: heterogeneous model integration –ESL, System-Level Design, System Security,
FDT Foil no 1 On Methodology from Domain to System Descriptions by Rolv Bræk NTNU Workshop on Philosophy and Applicablitiy of Formal Languages Geneve 15.
Fall 2004EE 3563 Digital Systems Design EE 3563 VHSIC Hardware Description Language  Required Reading: –These Slides –VHDL Tutorial  Very High Speed.
Basic Concepts of Component- Based Software Development (CBSD) Model-Based Programming and Verification.
1 Hardware Description Languages: a Comparison of AHPL and VHDL By Tamas Kasza AHPL&VHDL Digital System Design 1 (ECE 5571) Spring 2003 A presentation.
M.Mohajjel. Digital Systems Advantages Ease of design Reproducibility of results Noise immunity Ease of Integration Disadvantages The real world is analog.
ELEE 4303 Digital II Introduction to Verilog. ELEE 4303 Digital II Learning Objectives Get familiar with background of HDLs Basic concepts of Verilog.
Chapter 5 System Modeling. What is System modeling? System modeling is the process of developing abstract models of a system, with each model presenting.
04/26/20031 ECE 551: Digital System Design & Synthesis Lecture Set : Introduction to VHDL 12.2: VHDL versus Verilog (Separate File)
What’s Ahead for Embedded Software? (Wed) Gilsoo Kim
System-on-Chip Design Hao Zheng Comp Sci & Eng U of South Florida 1.
1 Iterative Program Analysis Abstract Interpretation Mooly Sagiv Tel Aviv University Textbook:
Brian Bailey Interfaces Technical Committee.
An Overview CS341 Digital Logic and Computer Organization F2003.
SUBJECT : DIGITAL ELECTRONICS CLASS : SEM 3(B) TOPIC : INTRODUCTION OF VHDL.
System-on-Chip Design
Digital System Design An Introduction to Verilog® HDL
Mixed-Digital/Analog Simulation and Modeling Research
Design Entry: Schematic Capture and VHDL
EEE2135 Digital Logic Design Chapter 1. Introduction
ECNG 1014: Digital Electronics Lecture 1: Course Overview
All Programmable FPGAs, SoCs, and 3D ICs
Abstract Interpretation
HDL Hardware Description Language
VHDL Introduction.
HIGH LEVEL SYNTHESIS.
Department of Computer Science Abdul Wali Khan University Mardan
Abstract Interpretation
Digital Designs – What does it take
Presentation transcript:

Domain Specific Model Computation Using a Lattice of Coalgebras Jennifer Streb, Garrin Kimmell, Nicolas Frisby, and Perry Alexander The University of Kansas / ITTC

The SLDL “Revolution” Silicon devices with 100,000,000 plus gates Affectionally known as a “sea of gates” Design abstractions unchanged since RTL Simulation is becoming overwhelmed Systems growing exponentially, simulation power sub-linearly Parallelization is not working Heterogeneous, reconfigurable fabrics ASIC, FPGA, Analog, MEMS New materials Unpredictable interactions between components Classic system-level design problem!

The last thing we need is another language... Software Approaches C/C++, SystemC, SpecC UML, SysML, XML Java, JBITS VHDL and Verilog Approaches Verilog, Superlog, SystemVerilog, Verilog-A VHDL, VHDL 200x, VHDL-AMS, VHDL+, VHDL++, SUAVE New languages BlueSpec, Lava, SAFL, Rosetta e, Sugar, Solving tomorrow’s problems with yesterday’s technology...

... but we could sure use a new semantics Constraints and Performance Requirements Timing, Power, Area, Packaging Formal Semantics Precise, mathematical definition of a specification’s meaning Support for heterogeneity Digital, analog, MEMS, optical on the same substrate Complexity management True abstract specification tools Decrease reliance on simulation Enable static and formal analysis tools Don’t actually change anything...

The Rosetta Language and Semantics Support for concurrent, system-level design Domains for multiple models of computation Facet Algebra for composition of heterogeneous specifications Interactions for understanding cross-domain implications Formal Semantics Set theoretic, dependent type system with support for reflection Coalgebraic facet models Category theoretic model composition Heterogeneous, extensible domain system Model-of-computation definitions Lattice-based organization Elaboration of new syntax

Coalgebras for Model Semantics Ideal for non-terminating stateful systems Observations on abstract state Catamorphism defines operational behavior Well-defined transformation semantics Pullbacks and pushouts for specification composition Functors for specification transformation Hold state abstract and define multiple observations Abstract State Observations Product Shared Specification

state_basedsignal_based The Domain Lattice static continuousdiscrete discrete_time finite_state continuous_time frequency RF digitalsequential-machine Unit-of-Semantics Model-of-Computation Engineering Domains CSPtrace_based synchronous A Domain is a common vocabulary for specification The Domain Lattice is a collection of interrelated domains

Functors in the Domain Lattice static continuousdiscrete discrete-time finite-state continuous-time frequency RF digitalsequential-machine state-basedsignal-based Extensions CSPtrace-based synchronous Homomorphisms General Functors Abstraction, Concretization A Functor moves information between domains

Establish soundness of abstractions and concretizations Sound integration of new domains Sound integration of synthesis and analysis tools ( state_based, , Γ, static ) is a Galois connection  is the abstraction function Γ is the concretization function We can calculate  when Γ is an extension No isomorphism unless   Γ    and  Γ    Correctness using Galois Connections domain state_based::static is state_type::type; s::state_type; next(x::state_type)::state_type; begin end domain state_based; domain security::state_based is riskType::type is posreal; p,nominal::riskType; activityType::subtype(real) is sel(x::real | x>=0.0 and x=<1.0); activity::activityType begin p’=activity*nominal+latent; end domain security;  Γ

Random Thoughts... Ignore the HDL community at your own peril... Timing is everything... Orthogonality is great, but not realistic... Formal semantics has saved us repeatedly... Are you interested in standards?

Current Status Rosetta Language Definition Standard in preparation for IEEE (currently 70% complete) Alexander, P., System Level Design with Rosetta, Morgan Kaufmann, Nov 2006 Alexander, P., System Level Semantics and Rosetta, Morgan Kaufmann, Oct 2007 (in progress) More Information Jacobs & Rutten, A Tutorial on (Co)Algebras and (Co)Induction, EATCS Bulletin 62, 1997 Ehrig & Mahr, Fundamental of Algebraic Specification I: Equations and Initial Algebra Semantics, Springer-Verlag, 1985 Davey & Priestly, Introduction to Lattices and Order, Cambridge University Press, 2002