Virginia Commonwealth University School of Engineering DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING Embedded Systems-EGRE 631 TECHNO* Toward an Interactive.

Slides:



Advertisements
Similar presentations
VHDL Design of Multifunctional RISC Processor on FPGA
Advertisements

MC68HC11 System Overview. System block diagram (A8 version)
Sumitha Ajith Saicharan Bandarupalli Mahesh Borgaonkar.
Programmable Interval Timer
ECE VHDL Microprocessor Design Final Student Project August 14 th, 2012 Emily Kan Erik Lee Edward Jones.
GamePal  Mark Fedorak  Vera Casteel  Ron Smith  Kris Pucci.
modules--perform I/O “housekeeping” functions use in project: example VHDL package—UP3pack.vhd modules must be “visible” in your path or included.
Configurable System-on-Chip: Xilinx EDK
1 Project supervised by: Dr Michael Gandelsman Project performed by: Roman Paleria, Avi Yona 26/4/2004 Multi-channel Data Acquisition System Final_A Presentation.
1 programmable logic Altera devices and the Altera tools major tasks in the silicon programming process using a “.vec” file for testing UP3 core library.
LED Light Show Critical Design Review Team Lit Michael Hatt Scott Butler Kristin Haeusler Brock Smith.
Technion – Israel Institute of Technology Department of Electrical Engineering High Speed Digital Systems Lab Mid-Term Presentation Performed by: Roni.
Computer Systems CS208. Major Components of a Computer System Processor (CPU) Runs program instructions Main Memory Storage for running programs and current.
ASPPRATECH.
Microcontroller based system design
FPGA-Based Arcade Emulation Danny Funk, Cory Mohling, Tony Milosch, David Gartner, John Alexander Advisor: Philip Jones Client: Joseph Zambreno.
Engineering 1040: Mechanisms & Electric Circuits Fall 2011 Introduction to Embedded Systems.
GallagherP188/MAPLD20041 Accelerating DSP Algorithms Using FPGAs Sean Gallagher DSP Specialist Xilinx Inc.
Dr. Sanatan Chattopadhyay Dr. Sudipta Bandopahyaya
Lesson 3 — How a Computer Processes Data
© Paradigm Publishing Inc. 2-1 Chapter 2 Input and Processing.
Digilent System Board Capabilities Serial Port (RS-232) Parallel Port 1 Pushbutton Hint: Good for a reset button Connected to a clock input. See Digilent.
COE4OI5 Engineering Design Chapter 2: UP2/UP3 board.
Practical PC, 7th Edition Chapter 17: Looking Under the Hood
Chapter Two Hardware Basics: Inside the Box. ©1999 Addison Wesley Longman2.2 Chapter Outline What Computers Do A Bit About Bits The Computer’s Core: CPU.
Understanding Computers, Ch.31 Chapter 3 The System Unit: Processing and Memory.
Dr. Rabie A. Ramadan Al-Azhar University Lecture 6
Pinewood Derby Timing System Using a Line-Scan Camera Rob Ostrye Class of 2006 Prof. Rudko.
DLS Digital Controller Tony Dobbing Head of Power Supplies Group.
© Paradigm Publishing Inc. 2-1 Chapter 2 Input and Processing.
Introduction to Experiment 5 VGA Signal Generator ECE 448 Spring 2009.
Microcontroller Presented by Hasnain Heickal (07), Sabbir Ahmed(08) and Zakia Afroze Abedin(19)
EE4OI4 Engineering Design UP1core Library Functions.
FPGA (Field Programmable Gate Array): CLBs, Slices, and LUTs Each configurable logic block (CLB) in Spartan-6 FPGAs consists of two slices, arranged side-by-side.
8279 KEYBOARD AND DISPLAY INTERFACING
Basic Sequential Components CT101 – Computing Systems Organization.
Introduction to structured VLSI Projects 4 and 5 Rakesh Gangarajaiah
ECE FPGA Microprocessor Design Erik Lee, Edward Jones, Emily Kan.
Design of a Novel Bridge to Interface High Speed Image Sensors In Embedded Systems Tareq Hasan Khan ID: ECE, U of S Term Project (EE 800)
displayCtrlr Specification
A Monte Carlo Simulation Accelerator using FPGA Devices Final Year project : LHW0304 Ng Kin Fung && Ng Kwok Tung Supervisor : Professor LEONG, Heng Wai.
ECE 448: Lab 4 VGA Display. Bouncing Ball.. Organization and Grading.
Lopamudra Kundu Reg. No. : of Roll No.:- 91/RPE/ Koushik Basak
ECE VHDL Microprocessor Design Final Student Project August 14 th, 2012 Emily Kan Erik Lee Edward Jones.
80386DX functional Block Diagram PIN Description Register set Flags Physical address space Data types.
MICROPROCESSOR FUNCTION Technician Series Created Mar 2015 gmail.com.
Computer and Information Sciences College / Computer Science Department CS 206 D Computer Organization and Assembly Language.
8279 KEYBOARD AND DISPLAY INTERFACING
Computer Hardware – System Unit
Digital Computer Concept and Practice Copyright ©2012 by Jaejin Lee Control Unit.
ECE VHDL Microprocessor Design Final Student Project August 14 th, 2012 Emily Kan Erik Lee Edward Jones.
Different Microprocessors Tamanna Haque Nipa Lecturer Dept. of Computer Science Stamford University Bangladesh.
Teaching Digital Logic courses with Altera Technology
بسم الله الرحمن الرحيم MEMORY AND I/O.
Capability of processor determine the capability of the computer system. Therefore, processor is the key element or heart of a computer system. Other.
Code Converters, Multiplexers and Demultiplexers
IC 3 BASICS, Internet and Computing Core Certification Computing Fundamentals Lesson 2 How Does a Computer Process Data?
KEYBOARD/DISPLAY CONTROLLER - INTEL Features of 8279 The important features of 8279 are, Simultaneous keyboard and display operations. Scanned keyboard.
1 Chapter 1 Basic Structures Of Computers. Computer : Introduction A computer is an electronic machine,devised for performing calculations and controlling.
Introduction to the FPGA and Labs
Programmable Logic Devices
Class Exercise 1B.
Microprocessor and Microcontroller Fundamentals
Computer Hardware – System Unit
Introduction to Microprocessors and Microcontrollers
Interfacing Memory Interfacing.
VGA INTERFACE Ly Le Department of Electrical Engineering
Morgan Kaufmann Publishers Computer Organization and Assembly Language
Registers.
♪ Embedded System Design: Synthesizing Music Using Programmable Logic
Presentation transcript:

Virginia Commonwealth University School of Engineering DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING Embedded Systems-EGRE 631 TECHNO* Toward an Interactive Environment for Embedded Systems Design Fadi Obaidat Dr. Jerry Tucker [April 2009]

Embedded Systems: Embedded System: is a special purpose/custom design computer used to control certain device. Need to be able to work with very limited resources (memory, power) and often has to work in a real-time environment. Employ a combination of hardware and software to perform a specific function. It is typically part of a larger system that may not necessarily be a ‘computer’ and works in a reactive and time- constrained environment.

Using Of Embedded Systems:  Cars Industry  Flight Control Systems  Mars Exploration Rover  Medical equipments and many other applications …

FPGAs Based Embedded Systems:  High performance.  Design Flexibility.  Low cost.  Reconfigurability.

Objectives:  Establishing an interactive environment which enables us to insert or replace HW/SW modules/applications written in VHDL/C.  Building Real Time Hardware Simulation to allow the user to see the results in real time.

About TECHNO* System:  Xilinx Spartan 3E FPGA 500K:  HDL: custom design, coprocessor…  Soft-core MicroBlaze Processor  C: either simple applications or under uClinux  HDL interfaces for the monitor and keyboard….  To achieve and test the objectives of the project, and to show the capabilities of the system, Two HW/SW applications were implemented and chosen because of the need to the HW speed and time-accuracy, and the SW flexibility.  Frequency Counter  Cycle Accurate Counter

Components and Resources:  Input Units: 8-Swithches, 4-Buttons, and or Keyboard.  Output Units: 8-LEDs, 4 digits 7-Segment- Display, Monitor or Data Show.  Logic and Processing Resources: 500K Spartan 3E FPGA, and Softcore MicroBlaze processor (part of 500k).

Digilent Nexys2 Board:

Spartan 3E: Spartan 3E 500K FPGA Digilent Board

Main HDL Modules:  Monitor Interface  ROM (.coe file)  RAM (Look Up Table)  Character Converter  Clock Divider  Frequency Counter  Cycle Accurate Counter  …... Not in use Keyboard Interface, buttons and 7-Sigment-Display…

Block Diagram of TECHNO* Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

RAM LUT (20*6) : Inputs: row_address[5..0], column_address[5..0], input_data[3..0], & clock_25Mhz. Outputs: output_data[3..0]. Function: takes the results of any algorithm and time stores them in specific registers attached to specific location on the screen, in the same time it outs its contents to the ROM through character converter module. clock_25Mhz row_address[5..0] column_address[5..0] input_data[3..0] output_data[3..0] 0001 Value to be shown on screen at this moment Data to be shown on screen Current location address on screen RAM (20*6)

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Character Converter: Inputs: RAM_out[3..0] & clock_25Mhz. Outputs: Character address[5..0]. Function: Get the address of the number or character that will be shown on screen and pass it to the ROM to be displayed on the screen Output of RAM Data goes to the ROM, addres of that char. RAM_out[3..0] clock_25Mhz Char. add[5..0] Character Converter 0111=7

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

ROM (64*8*8) : Inputs: char_address[5..0], font_row[2..0] & font_col[2..0]. Outputs: rom_mux_output. Function: used to generate dots on a video display. Each character is represented by an 8 by 8 pixels binary. Font data and its addressees are stored in a.coe memory initialization file. char_address[5..0] font_row[2..0] font_col[2..0] rom_mux_output ROM ‘ 1 ’ at each pixel we want to make dot on Address of ‘ A ’ = 1

ROM contents: Address Char. Data This is an example That show how the Binary of the character A stored in the.coe file (ROM) Char address: Font row: Font col.:

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Monitor: Inputs: red_out, green_out blue_out, horiz_sync, ver_sync. Outputs: dots drown on screen. Function: takes the outputs of the monitor interface and draw them pixel by pixel on screen. Monitor Pins PIN# SIGNAL PIN#SIGNAL 1RED0.7v9NC 2GREEN0.7v10SYNC RTN 3BLUE0.7v11ID0 4ID212ID1 or DDC DATA 5GND13HSYNC 6RED SHIELD14VSYNC 7GREEN SHIELD15ID3 or DDC CLOCK 8BLUE SHIELD Monitor Pins      

Monitor Interface (60 frame/sec) : Inputs: 3-red, 3-green, 2-blue, & clock_25Mhz. Outputs: 3-red_out, 3-green_out, 2-blue_out, horiz_sync, ver_sync, pixel_row[9..0]& pixel_column[9..0]. Function: generates horizontal and vertical signals to synchronize the drown eight bit colors on each pixel. clock_25Mhz red green blue 3-red_out 3-green_out 2-blue_out pixel_row[9..0] pixel_column[9..0] ver_sync_out horiz_sync_out Monitor Interface Monitor go to the RAM and ROM to make sync between pixels and Char Tell monitor to refresh anew row of 640pixels v h

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Clock Divider: Inputs: clock_50Mhz. Outputs: clock_25MHz. Function: used to generate appropriate, a 25MHz, clock signal to be used by monitor interface. clock_50Mhzclock_25MHz Clock Divider 25 MHz50Mhz

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

TECHNO* Applications:  Frequency Counter: Measure the frequency of an external signal.  Cycle Accurate Counter: Measure the number of cycles needed to execute certain C function or program.

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Frequency Counter: Inputs: IC12 pin#5 external clk and 50MHz clk. Outputs: 1-8 decimal digits represent the frequency in Hz. Function: Counting the number of positive edges of the guest signal and store the result in 8 registers to be displayed on the screen. frq_clk Frequency Counter Guest CLK Frq_value [32..0] Reg0Reg1Reg2Reg3Reg4Reg5Reg6Reg7 clock_50Mhz 50Mhz

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Accurate Cycle Counter: Inputs: Start_Done’ [C program] and 50MHz clk. Outputs: decimal digits represent number of cycles/prog. Function: Counting the number of clocks between the start flag and the end flag => Logic Analyzer. //C_Function Done_Start++;//=01; Function() { ………. ………. ……… } Done_Start++;//=10; Start_Done’ Frequency Counter #clks [32..0] clock_50Mhz 50Mhz

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

MicroBlaze:  Soft Core - reduced instruction set computer (RISC)  32-bit general purpose registers  32-bit instruction word with three operands and two addressing modes  32-bit address bus

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Keyboard*: Inputs: mechanical input by user hand. Outputs: serial data & keyboard clock Function: send a serial data to the keyboard interface, each 8-bit serial data represent a scan code to the pressed button. Keyboard PS/2pins PS/2 KEYBOARD PIN#SIGNALPIN#SIGNAL 1DATA4+5 2NC5CLOCK 3GND6NC   If you pressed button ‘ A ’ the keyboard send Time 0 Time 7 …

Keyboard Interface*: Inputs: keyboard_clk, keyboard_data, clock_50Mhz, reset & read. Outputs: scan_code[7..0] & scan_ready. Function: converts the serial data from the key board to parallel format to produce the scan code output. Keyboard Interface keyboard_clk keyboard_data clock_50Mhz reset read scan_code[7..0] scan_ready Serial data of ‘ A ’ = Ex: Scan code of ‘ A ’ =1C Ex:

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Keyboard Monitor Keyboard Card Monitor Card ROM Frequency Counter Clock Divider Conv. Number RAM 50 MHz In this area: You can add or replace any VHDL module or C function. Cycle Acc. Counter IC12 pin#5 Interface Char. Converter

Converting Number*: Inputs: scan_code[7..0] & clock_50Mhz. Outputs: total_binary_no.[7..0]. Function: level I:convert the scan code of the number to its real value. level II: calculate the total number entered by keyboard. Converting Number scan_code[7..0] clock_50Mhz total_binary_no.[7..0] Data from keyboard intr. After conv. it to its real values 254 = Data to VHDL Module 2=0E= Scan code of 2 (2*100)+(5*10) +(4)

Device Utilization Summary: Selected Device : 3s500efg320-4 Number of Slices: 1464 out of % Number of Slice Flip Flops: 1767 out of % Number of 4 input LUTs: 2431 out of % -Number used as logic: Number used as Shift registers: 90 -Number used as RAMs: 256 Number of IOs: 29 Number of bonded IOBs: 29 out of % Number of BRAMs: 7 out of 20 35% Number of MULT18X18SIOs: 3 out of 20 15% Number of GCLKs: 4 out of 24 16% Number of DCMs: 1 out of 4 25%

Conclusion:  In this project we built an interactive environment for embedded systems design. This environment allows the end user to insert C application and/or HDL custom design and get real time simulation through the monitor.  It allows to test the performance of a certain SW or/and HW application. In addition to that, it allows evaluating the efficiency of using coprocessor technique.

References    

Any Question