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Presentation transcript:

1 Down Place Hammersmith London UK 530 Lytton Ave. Palo Alto CA USA

Deployed Maximum Performance Computing customers comparing 1 box from Maxeler (in a deployed system) with 1 box from Intel Customer 1 App1 19x and App2 25x Customer 2 1.2GB/s per card Customer 3 App1 22x, App2 22x Customer 4 App 32x and App2 29x Customer 5 30x Customer 6 App1 26x and App2 30x 2

Maxeler delivers bespoke dataflow HPC solutions => An HPC Computing Appliance for “structured Big Data” Building the HPC compute fabric based on the application in a multi-disciplinary, data-centric approach What Maxeler Does Hardware  Building 1U boxes, Workstations and the cards inside.  Building custom large memory systems to deal with Big Data  Integrating rack system with networking and storage.  Integrated environment brings bespoke dataflow computing to high end HPC users  Dataflow programming in Java and Eclipse IDE Consulting  HPC System Performance Architecture  Algorithms and Numerical Optimization  Integration into business and technical processes Software 3

Dataflow Computing

Technology One result per clock cycle MAXELER DATAFLOW COMPUTING Dynamic (switching) Power Consumption: Minimal frequency f achieves maximal performance, thus for a given power budget, we get Maximum Performance Computing (MPC)! 5

6 Explaining Control Flow versus Data Flow Many specialized workers are more efficient (data flow) Experts are expensive and slow (control flow) Analogy 1: The Ford Production Line

Example Accelerated Applications

Compute value of complex financial derivatives (CDOs) Typically run overnight, but beneficial to compute in real-time Many independent jobs Speedup: x Power consumption per node drops from 250W to 235W/node 8 JP Morgan Credit Derivatives Pricing O. Mencer and S. Weston, 2010

3000³ Modeling *presented at SEG Compared to 32 3GHz x86 cores parallelized using MPI 8 Full Intel Racks ~100kWatts => Single 3U Maxeler System <1kWatt 9

Given matrix A, vector b, find vector x in Ax = b. 10 Sparse Matrix Solving with Maxeler O. Lindtjorn et al, HotChips 2010 Domain Specific Address and Data Encoding (*Patent Pending) MAXELER SOLUTION: 20-40x in 1U DOES NOT SCALE BEYOND 6 x86 CPU CORES