– 1 – A circuit-level simulation approach for VCSEL-based optical interconnect System level behaviour of VCSEL-based optical interconnects: a circuit-level simulation approach Michiel De Wilde Electronics and Information Systems dept. Olivier Rits Information Technology dept. Ghent University — IMEC, Belgium IST project “Interconnect by Optics”

– 2 – A circuit-level simulation approach for VCSEL-based optical interconnect Optical interconnect rationale (

– 3 – A circuit-level simulation approach for VCSEL-based optical interconnect Optical interconnect rationale (2) Packet routers Parallel and distributed processing systems

– 4 – A circuit-level simulation approach for VCSEL-based optical interconnect Optical interconnect rationale (3) A L Wire capacitance + resistance & skin effect  bit-rate limit: (Miller-Özaktas)

– 5 – A circuit-level simulation approach for VCSEL-based optical interconnect Optical interconnect rationale (4) Physical solution: use of optics –No electromagnetic wave phenomena (crosstalk) –Losses barely sensitive to distance & frequency –Potential to scale much better than wires Advantage in using optical interconnects for ever decreasing distances –From chip to chip: onboard, and board to board

– 6 – A circuit-level simulation approach for VCSEL-based optical interconnect VCSEL-based parallel optical I/O Hybridised 2D VCSEL array Hybridised 2D photodetector array Parallel waveguides (e.g. POF flexes) Multi-waveguide connectors (e.g. overmoulded POF bundles) silicon optical devices

– 7 – A circuit-level simulation approach for VCSEL-based optical interconnect Design space Waveguide & interconnection technology (ribbons, flexes, planar integration) VCSEL technology familyPhotodetector technology family Chip packaging technology for optical access CMOS hybridisation Digital encoding & clock recovery systems Interface circuits of electro-optical devices TX

– 8 – A circuit-level simulation approach for VCSEL-based optical interconnect Design space (2) Continuously-valued design parameters as well –λ, operating currents, numerical aperture… Choices affect system-level characteristics –Technological feasibility (interoperability, yield) –Timing characteristics (delay, skew) –Reliability (spikes, power  temperature, misalignment) –Monetary cost

– 9 – A circuit-level simulation approach for VCSEL-based optical interconnect Increase of numerical aperture Better coupling Worse coupling Less losses Tradeoffs between choices –Multi-objective –Counteracting effects Design space exploration VCSEL photodiode bend Find: systematic way of making choices = design methodology Goal: formalized into a design tool 1.The designer states system-level characteristics 2.The design tool assists in making product and parameter choices

– 10 – A circuit-level simulation approach for VCSEL-based optical interconnect Design methodology development VCSEL drive current Photodetector sensitivity Fiber numerical aperture Interface technology … Product and parameter choices Power dissipation Link latency Link reliability Link skew Implementation cost System-level link properties … STAGE 1 predict STAGE 2 Construct multi-objective solution (e.g.) link bit error rate (e.g.) total power dissipation Infeasible design region Sub-optimal designs Pareto-optimal designs STAGE 3 target

– 11 – A circuit-level simulation approach for VCSEL-based optical interconnect Design methodology focus: step 1 Predicting effect of design alternatives Issues for direct estimation (e.g. from tabular data) –Difficult prediction of noise/variation propagation –Dynamic multi-domain interactions (electrical, optical, thermal) Implement framework for time-domain link simulation to –Estimate system-level properties for various setups –Verify behaviour of optical interconnect within a digital system (mixed-signal simulation)

– 12 – A circuit-level simulation approach for VCSEL-based optical interconnect Simulation framework: link “building block” models Circuit-level behavioural models instead of physical models –Only time-dependent equations –No spatial dependency Mixed-signal Verilog-AMS (or VHDL-AMS) instead of SPICE –Direct expression of differential equations –Native support for signals in different domains

– 13 – A circuit-level simulation approach for VCSEL-based optical interconnect Example: photodiode model module pin_photodiode(in,anode,cathode); input in; inout anode, cathode; power in; electrical anode, cathode; parameter real Cdep=0, Cbo=0, Rbas=0, Resp=0, Id=0; parameter real pole=-1/(Cdep*Rbas); parameter real laplace_coeff_0=Cdep+Cbo; parameter real laplace_coeff_1=Cdep*Cbo*Rbas; charge rc; analog begin I(cathode,anode) <+ laplace_zp(Resp*Pwr(in)+Id,{},{pole,0}); Q(rc) <+ laplace_np(V(cathode,anode),{laplace_coeff_0,laplace_coeff_1},{pole,0}); end endmodule Terminals Model parameters Equations describing internal state and outputs

– 14 – A circuit-level simulation approach for VCSEL-based optical interconnect Simulation framework: model hierarchy Behavioural models (Verilog-AMS) – with symbolic parameters Driver VCSEL #1 VCSEL #2 Optical path Photodetector Receiver Model instantations with parameters (Spectre netlist files) Driver #1 VCSEL #1 #2 Optical path Photodetector Receiver #2 Complete interconnect specifications (Spectre netlist files) Interconnect specification #1 Interconnect specification #2

– 15 – A circuit-level simulation approach for VCSEL-based optical interconnect Driver/receiver model Normal analog electrical circuits IP protection: no real circuit provided Alternative: parameterised flowchart Receiver flowchart Transimpedance preamplifierPostamplifier Decision circuit Equaliser Limiting amplifier Photocurrent input Digital output

– 16 – A circuit-level simulation approach for VCSEL-based optical interconnect VCSEL model Nonlinear 1st order differential equation system Issue: getting an initial solution VCSEL current Output power Bad steady state solution Steady state solution VCSEL characterisation is hard (M.X. Jungo)

– 17 – A circuit-level simulation approach for VCSEL-based optical interconnect Fiber-based optical path TBD: Statistical modelling of misalignment VCSEL adacent photodetector adjacent VCSEL Macrobend losses Absorption Connector losses & crosstalk VCSEL-fiber coupling losses VCSEL-fiber crosstalk Fiber-detector crosstalk & coupling losses Coupling coefficients for losses & crosstalk Abstraction of dispersion (short distance)

– 18 – A circuit-level simulation approach for VCSEL-based optical interconnect Fiber bend losses TBD: Take into account that the mode distributions do not directly stabilise after a bend Currently: accumulate bend losses using a table obtained by raytracing (H. Lambrecht) 90° bend X axis: NA fiber Y axis: bending radius Blue color = high losses

– 19 – A circuit-level simulation approach for VCSEL-based optical interconnect Simulation features Process corner simulation –Best-case or worst-case value for all model parameters –Lower and upper boundaries are not very tight Statistical simulation (partly TBD) –Time-invariable statistics: Inter-process & intra-process variations Misalignment –Dynamic statistics: Noise (e.g. VCSEL RIN noise) Effects like power supply spikes

– 20 – A circuit-level simulation approach for VCSEL-based optical interconnect Simulation example: transient 1 link with 10dB attenuation in the optical path (exaggerated VCSEL model parameters)

– 21 – A circuit-level simulation approach for VCSEL-based optical interconnect Conclusion Framework for simulation of guided wave optical interconnect systems –Design methodology development: enable prediction of system-level interconnect characteristics –Mixed-signal simulation of optical interconnect within a digital system Operational, but not yet mature –Simulation is doable, characterisation is hard (especially statistical characterisation)

– 22 – A circuit-level simulation approach for VCSEL-based optical interconnect Acknowledgements IST Interconnect by Optics Project –Helix AG: driver/receiver block diagrams –Avalon Photonics: VCSEL measurements –Hannes Lambrecht (Ghent University, IMEC-INTEC): macrobend losses Fund for Scientific Research – Flanders (Belgium) (F.W.O.) –Research assistantship

– 23 – A circuit-level simulation approach for VCSEL-based optical interconnect Thermal effects Temperatures are difficult to predict VCSELs are very temperature sensitive Operating temperature of up to 85°C Temperature distribution in the simulation –Simulator implementation: not difficult –TBD: Estimate expected temperature differences in a VCSEL array