MSI Devices M. Mano & C. Kime: Logic and Computer Design Fundamentals (Chapter 5) Dr. Costas Kyriacou and Dr. Konstantinos Tatas ACOE161 - Digital Logic.

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MSI Devices M. Mano & C. Kime: Logic and Computer Design Fundamentals (Chapter 5) Dr. Costas Kyriacou and Dr. Konstantinos Tatas ACOE161 - Digital Logic for Computers - Frederick University

ACOE161 - Digital Logic for Computers - Frederick University MSI Devices Medium Scale Integration (MSI) devices are digital devices that are build using a few tens to hundreds of logic gates. MSI devices are used as discrete devices packed in a single Integrated Circuit (IC), or as building blocks for other, more complex devices such as memory devices or microprocessors. Some typical MSI devices are the following: Encoders and Decoders Multiplexers and Demultiplexers Full Adders Latches and flip flops Registers and Counters ACOE161 - Digital Logic for Computers - Frederick University

Examples of MSI Devices Decimal to BCD Encoder 4-to-1 Multiplexer BCD to Decimal Decoder ACOE161 - Digital Logic for Computers - Frederick University

ACOE161 - Digital Logic for Computers - Frederick University Decoders A decoder is a combinational digital circuit with a number of inputs ‘n’ and a number of outputs ‘m’, where m= 2n Only one of the outputs is enabled at a time. The output enabled is the one specified by the binary number formed at the inputs of the decoder. On the circuit below, the inputs of the decoder are connected on three switches, forming the number 5 [(101)2], thus only LED #5 will be ON ACOE161 - Digital Logic for Computers - Frederick University

ACOE161 - Digital Logic for Computers - Frederick University 2 to 4 Line Decoder: ACOE161 - Digital Logic for Computers - Frederick University

ACOE161 - Digital Logic for Computers - Frederick University 3 to 8 Line Decoder: ACOE161 - Digital Logic for Computers - Frederick University

3 to 8 Line Decoder: (Implementation using two 2-to-4 decoders) ACOE161 - Digital Logic for Computers - Frederick University

3 to 8 Line Decoder: (Implementation using two 2-to-4 decoders) ACOE161 - Digital Logic for Computers - Frederick University

4 to 16 Line Decoder: (Implementation using four 2-to-4 decoders) ACOE161 - Digital Logic for Computers - Frederick University

ACOE161 - Digital Logic for Computers - Frederick University ENCODERS A decoder in general is a combinational digital circuit with with a number of inputs ‘m’ and a number of outputs ‘n’, where n = log2m A binary encoder has precisely the opposite functionality of the binary decoder. A priority encoder is a special case of encoder used in computer interrupt mechanisms to specify which device requests service and prioritize interrupts that occur at the same time I3 I2 I1 I0 O1 O0 V X 1 ACOE161 - Digital Logic for Computers - Frederick University  

ACOE161 - Digital Logic for Computers - Frederick University Multiplexers A multiplexer is a device that has a number of data inputs “m”, and number of control inputs “n” and one output, such that m=2n. The output has always the same value as the data input specified by the binary number at the control inputs. The rotary switch (selector) shown in figure (a) below, is equivalent to a 4-to-1 multiplexer. The sliding switch shown in figure (b) below, is equivalent to an 8-to-1 multiplexer. ACOE161 - Digital Logic for Computers - Frederick University

Internal structure of a 2-to-1 multiplexer. The design of a 2-to-1 multiplexer is shown below. If S=0 then the output “Y” has the same value as the input “I0” If S=1 then the output “Y” has the same value as the input “I1” ACOE161 - Digital Logic for Computers - Frederick University

4-to-1 Multiplexer (MUX) S1 S0 O I0 1 I1 I2 I3 ACOE161 - Digital Logic for Computers - Frederick University

ACOE161 - Digital Logic for Computers - Frederick University 1-bit Full Adder ACOE161 - Digital Logic for Computers - Frederick University

4-bit Full Adder (Ripple-Carry Adder) To obtain a 4-bit full adder we cascade four 1-bit full adders, by connecting the Carry Out bit of bit column M to the Carry In of the bit column M+1, as shown below. The Carry In of the Least Significant column is set to zero. Example: Find the bit values of the outputs {Cout,S3..S0} of the full adder shown below, if {A3..A0 = 1011} and {B3..B0 = 0111}. ACOE161 - Digital Logic for Computers - Frederick University

ACOE161 - Digital Logic for Computers - Frederick University Example Design a 4-bit adder/subtracter using Full-adders and gates. ACOE161 - Digital Logic for Computers - Frederick University

ACOE161 - Digital Logic for Computers - Frederick University Magnitude Comparator ACOE161 - Digital Logic for Computers - Frederick University

ACOE161 - Digital Logic for Computers - Frederick University Review questions How many input/output signals are present in a 5-to-32 decoder? 32-to-1 MUX? 32-bit Ripple-Carry Adder (RCA)? How many 2-to-1 MUXs are required to build a 32-to-1 MUX? Design a logic unit with 2 data inputs (A, B), three select inputs (S2, S1, S0) and the following specifications: S2 S1 S0 O A AND B 1 A OR B A XOR B A NAND B A NOR B A XNOR B A΄ B΄ ACOE161 - Digital Logic for Computers - Frederick University

ACOE161 - Digital Logic for Computers - Frederick University Review questions 2 Use two 4-to-1 MUXs to build a full adder Implement the following Boolean algebra equation using only a single 8-to-1 MUX: F(A,B,C,D) = Σ(0,3,5,6,8,9,14,15) ACOE161 - Digital Logic for Computers - Frederick University