Synthesis for Concurrent Models Anca Muscholl LIAFA, Univ. Paris 7 Dagstuhl, June 2005 joint work with Blaise Genest (Warwick, UK)

Slides:



Advertisements
Similar presentations
Model Checking Lecture 2. Three important decisions when choosing system properties: 1automata vs. logic 2branching vs. linear time 3safety vs. liveness.
Advertisements

Black Box Checking Book: Chapter 9 Model Checking Finite state description of a system B. LTL formula. Translate into an automaton P. Check whether L(B)
Automatic Verification Book: Chapter 6. How can we check the model? The model is a graph. The specification should refer the the graph representation.
Clocked Mazurkiewicz Traces and Partial Order Reductions for Timed Automata D. Lugiez, P. Niebert, S. Zennou Laboratoire d Informatique Fondamentale de.
Language and Automata Theory
Modular Processings based on Unfoldings Eric Fabre & Agnes Madalinski DistribCom Team Irisa/Inria UFO workshop - June 26, 2007.
CS 267: Automated Verification Lecture 8: Automata Theoretic Model Checking Instructor: Tevfik Bultan.
ES Seminar1 Communicating Transaction Processes P.S. Thiagarajan National University of Singapore Joint Work with: Abhik Roychoudhury; ……
Lecture 24 MAS 714 Hartmut Klauck
Knowledge Based Synthesis of Control for Distributed Systems Doron Peled.
1 Model checking. 2 And now... the system How do we model a reactive system with an automaton ? It is convenient to model systems with Transition systems.
Automatic Verification Book: Chapter 6. What is verification? Traditionally, verification means proof of correctness automatic: model checking deductive:
Distributed Markov Chains P S Thiagarajan School of Computing, National University of Singapore Joint work with Madhavan Mukund, Sumit K Jha and Ratul.
1 1 CDT314 FABER Formal Languages, Automata and Models of Computation Lecture 3 School of Innovation, Design and Engineering Mälardalen University 2012.
Timed Automata.
Deterministic Negotiations: Concurrency for Free Javier Esparza Technische Universität München Joint work with Jörg Desel and Philipp Hoffmann.
Distributed Computing 5. Snapshot Shmuel Zaks ©
Succinct Approximations of Distributed Hybrid Behaviors P.S. Thiagarajan School of Computing, National University of Singapore Joint Work with: Yang Shaofa.
1 Towards formal manipulations of scenarios represented by High-level Message Sequence Charts Loïc Hélouet Claude Jard Benoît Caillaud IRISA/PAMPA (INRIA/CNRS/Univ.
Introduction to Computability Theory
1 Formal Methods in SE Qaisar Javaid Assistant Professor Lecture # 11.
Ordering and Consistent Cuts Presented By Biswanath Panda.
Model Checking. Used in studying behaviors of reactive systems Typically involves three steps: Create a finite state model (FSM) of the system design.
1 Carnegie Mellon UniversitySPINFlavio Lerda SPIN An explicit state model checker.
On-the-fly Model Checking from Interval Logic Specifications Manuel I. Capel & Miguel J. Hornos Dept. Lenguajes y Sistemas Informáticos Universidad de.
Validating Streaming XML Documents Luc Segoufin & Victor Vianu Presented by Harel Paz.
Bridging the gap between Interaction- and Process-Oriented Choreographies Talk by Ivan Lanese Joint work with Claudio Guidi, Fabrizio Montesi and Gianluigi.
Software Engineering, COMP201 Slide 1 Protocol Engineering Protocol Specification using CFSM model Lecture 30.
Models of Computation for Embedded System Design Alvise Bonivento.
1 Petri Nets Marco Sgroi EE249 - Fall 2001 Most slides borrowed from Luciano Lavagno’s lecture ee249 (1998)
Review of the automata-theoretic approach to model-checking.
1 Ivan Lanese Computer Science Department University of Bologna Italy Concurrent and located synchronizations in π-calculus.
Theory of Computing Lecture 22 MAS 714 Hartmut Klauck.
Chapter 17 Theoretical Issues in Distributed Systems
02/06/05 “Investigating a Finite–State Machine Notation for Discrete–Event Systems” Nikolay Stoimenov.
Cheng/Dillon-Software Engineering: Formal Methods Model Checking.
Regular Model Checking Ahmed Bouajjani,Benget Jonsson, Marcus Nillson and Tayssir Touili Moran Ben Tulila
Model-based Methods for Web Service Verification.
THEORY OF COMPUTATION 08 KLEENE’S THEOREM.
1 Unit 1: Automata Theory and Formal Languages Readings 1, 2.2, 2.3.
Theory of Languages and Automata
Ivan Lanese Computer Science Department University of Bologna/INRIA Italy Amending Choreographies Joint work with Fabrizio Montesi and Gianluigi Zavattaro.
An Ontological Framework for Web Service Processes By Claus Pahl and Ronan Barrett.
1 Undecidable Problems of Decentralized Observation and Control Stavros Tripakis VERIMAG (based on [Puri,Tripakis,Varaiya-SCODES’01], [Tripakis-CDC’01],
Copyright , Doron Peled and Cesare Tinelli. These notes are based on a set of lecture notes originally developed by Doron Peled at the University.
Correct-by-construction asynchronous implementation of modular synchronous specifications Jacky Potop Benoît Caillaud Albert Benveniste IRISA, France.
Internal Talk, Oct Executable Specifications using Message Sequence Charts Abhik Roychoudhury School of Computing National University of Singapore.
1 CD5560 FABER Formal Languages, Automata and Models of Computation Lecture 3 Mälardalen University 2010.
Model 3: Message-Passing Text We saw –Diagrams –Shared-variables text Now –Message-passing text (like CSP)
CSCI1600: Embedded and Real Time Software Lecture 11: Modeling IV: Concurrency Steven Reiss, Fall 2015.
Products of MSC-Graphs Philippe Darondeau Blaise Genest Loïc Hélouët IRISA Laboratory / CNRS&INRIA Rennes, France.
Model Checking Lecture 1. Model checking, narrowly interpreted: Decision procedures for checking if a given Kripke structure is a model for a given formula.
Ordering of Events in Distributed Systems UNIVERSITY of WISCONSIN-MADISON Computer Sciences Department CS 739 Distributed Systems Andrea C. Arpaci-Dusseau.
Chapter 5 Finite Automata Finite State Automata n Capable of recognizing numerous symbol patterns, the class of regular languages n Suitable for.
CSCI 4325 / 6339 Theory of Computation Zhixiang Chen.
Introduction to distributed systems description relation to practice variables and communication primitives instructions states, actions and programs synchrony.
Model Checking Lecture 2. Model-Checking Problem I |= S System modelSystem property.
Model Checking Lecture 2 Tom Henzinger. Model-Checking Problem I |= S System modelSystem property.
1 Regular grammars Programming Language Design and Implementation (4th Edition) by T. Pratt and M. Zelkowitz Prentice Hall, 2001 Section
Communicating Timed Automata Pavel Krčál Wang Yi Uppsala University [CAV’06]
Polynomial analysis algorithms for free-choice workflow nets
CPE555A: Real-Time Embedded Systems
Regular grammars Programming Language Design and Implementation (4th Edition) by T. Pratt and M. Zelkowitz Prentice Hall, 2001 Section
Clockless Computing COMP
Automatic Verification
Introduction to Petri Nets (PNs)
Instructor: Aaron Roth
Regular grammars Programming Language Design and Implementation (4th Edition) by T. Pratt and M. Zelkowitz Prentice Hall, 2001 Section
Chapter 1 Regular Language
Regular grammars Programming Language Design and Implementation (4th Edition) by T. Pratt and M. Zelkowitz Prentice Hall, 2001 Section
Presentation transcript:

Synthesis for Concurrent Models Anca Muscholl LIAFA, Univ. Paris 7 Dagstuhl, June 2005 joint work with Blaise Genest (Warwick, UK)

Framework Current applications/systems (web, networks, embedded systems…) are mostly distributed and asynchronous Design process needs formal methods and automatic verification techniques Here: Distributed synthesis for closed systems

Outline of talk Models for distributed systems Synthesis for shared-variable FSM Synthesis for communicating FSM Outlook

Distributed Models Fixed set of processes and FSM M p (one per process p) M p cooperate either through messages/signals (message-passing, I/0 automata) or shared variables (Petri nets, asynchronous automata)

Outline of talk Models for distributed systems Synthesis for shared-variable FSM Synthesis for communicating FSM Outlook

Shared-variable models distributed alphabet A = (A 1, …, A n ), over processes {1,2,…,n} action a involves processes from dom(a) = { i j a 2 A i } a-transition changes all local states of processes i 2 dom(a)

Shared variables Two flavors of transitions: (q 1,…,q n ) ! a (q’ 1,…,q’ n ) Loosely cooperating q i ! a,i q’ i for all i 2 dom(a) Synchronously communicating (asynchronous automata) (q i ) i 2 dom(a) ! a (q’ i ) i 2 dom(a)

Shared variables Example: A = {a,b,c}, A 1 = {a,b}, A 2 = {b,c} dom(a) = {1}, dom(b) = {1,2}, dom(c) = {2} q1 q2 a b c loosely-cooperating: if (0,0) ! b (1,1) and (1,1) ! b (0,0), then also (0,1) ! b (1,0) and (1,0) ! b (0,1)

Loosely cooperating case Given: FSM M = (Q, A, q 0, ! ) Q: Test whether M is equivalent to a loosely cooperating FSM, and construct one, if yes. PSPACE algorithm: test whether L(M) is a product language: L(M) =  i  Proj i L(M)

Synchronous communication Given: FSM M = (Q, A, q 0, !, F) Q: Test whether M is equivalent to a synchronously-communicating FSM, and construct one, if yes. PSPACE algorithm: test whether L(M) is commutation-closed: dom(a) Å dom(b) = ; implies u ab v 2 L(M) iff u ba v 2 L(M)

Synchronous communication alphabet A, independence relation || µ A £ A a || b iff dom(a) Å dom(b) = ; Mazurkiewicz trace [w] = set of words obtained from w by commuting independent adjacent letters Framework: Mazurkiewicz traces

Synchronous communication Example: A = {a,b,c}, A 1 = {a,b}, A 2 = {b,c} dom(a) = {1}, dom(b) = {1,2}, dom(c) = {2} trace [acabbca] = {acabbca, aacbbca, caabbac,…} L = ((aa+ac+ca+cc)* (a+c) b)* commutation-closed

Synchronous communication Zielonka’s Theorem ’87 For every commutation-closed regular language one can construct an equivalent, deterministic synchronous-communication FSM of doubly exponential size. Rem. Determinism hard to get. Doubly exponential only in number of processes.

Synchronous communication FSM M 1, M 2, with state set Q i = {0,1} each a-transition counts modulo 2 in Q 1 (c-transition modulo 2 in Q 2 ) each b-transition checks that the sum is odd, and resets both counters Example: A = {a,b,c}, A 1 = {a,b}, A 2 = {b,c} L = ((aa+ac+ca+cc) * (a+c) b) * comm.-closed

Synchronous communication Deterministic synchronous- comm. (Muller) FSM Regular, commutation- closed languages Monadic second-order logic over trace pomsets [Ebinger, Diekert, Muscholl, Thomas, Zielonka ‘9x]

Synchronous communication: deadlocks Additional requirement: deadlock-freeness Safe synchr.-comm. FSM: all reachable states are final [Stefanescu/Esparza/M.’03, Mukund’02] A regular, commutation-closed language L is safely implementable iff it is prefix- closed and satisfies the forward diamond property: ua 2 L, ub 2 L, a || b implies uab 2 L

Outline of talk Models for distributed systems Synthesis for shared-variable FSM Synthesis for communicating FSM Outlook

Asynchronous communication models Several peers exchange messages through P2P fifo channels (unbounded) Each peer: FSM with send/receive events to/from other peers ITU norm Z.100 (SDL)

Sequential processes P, Q, … Each process: FSM A P with events: send P snd Q(m), receive P rcv Q(m) Configuration of CFM = current local states s P + current contents of (FIFO) channels C P,Q infinite-state systems Communicating FSM (CFM)

Psnd C Crcv P FIFO channels P C PCPC rcv P snd C Psnd C Crcv P Psnd C Crcv P Psnd C Crcv P CFM Executions of CFM

CFM: Good for what? CFM hard to design (need to consider global runs/executions) … aka assembler programming CFM: models of protocols Suitable formalism for protocol specification?

PCPC rcv(P) snd(C) Psnd(C) Crcv(P) Psnd(C) Crcv(P) Psnd(C) Crcv(P) P C several executions: one diagram Message sequence chart (ITU norm Z120) Diagrams: One for All

Events a,b,c,d Partial order: process order: a < P c, b < C d message order: a < b, c < d time MSC P C a b c d Partial order semantics: Example: events b and c are uncomparable Message Sequence Charts (MSC, ITU Z.120)

Scenario-based formalism: positive and negative scenarios Capture requirements in visual form Good for high-level description Collection of MSC: MSC-graphs

P C P C P C P C Graph representation: composition, iteration, choice MSC-graph defines set of MSCs: Collections of scenarios: MSC-graphs

L(G) = set of MSC labeling accepting paths of G C1C1 C2C2 G P data C1C1 C2C2 P C1C1 C2C2 P ack resend ack A B C S = {A,B,C} Initial state A Final state C Accepting paths AB * C resend MSC-Graphs (ITU Z.120)

L(G) = set of MSC labelling accepting paths of G C1C1 C2C2 G P data C1C1 C2C2 P C1C1 C2C2 P ack resend ack C1C1 C2C2 P A B C MSC-Graphs: executions

L(G) = set of MSC labeling accepting paths of G C1C1 C2C2 G P data C1C1 C2C2 P C1C1 C2C2 P ack resend ack C1C1 C2C2 P data A B C A MSC-Graphs: executions

L(G) = set of MSC labeling accepting paths of G C1C1 C2C2 G P data C1C1 C2C2 P C1C1 C2C2 P ack resend ack C1C1 C2C2 P data resend ack resend A B C AB MSC-Graphs: executions

L(G) = set of MSC labeling accepting paths of G C1C1 C2C2 G P data C1C1 C2C2 P C1C1 C2C2 P ack resend ack C1C1 C2C2 P data resend ack resend ack A B C ABC MSC-Graphs: executions

P C MSC-graph equivalent to Specification PCPC rcv(P) snd(C) CFM Implementation CFM versus MSC-Graphs?

Mismatch between MSC and CFM CMSC CMSC-graph [Peled et al. ’01] Compositional MSC (CMSC) and CMSC-graphs

Synthesis: Communication Specification: high-level, abstract,.. MSC-graph,.. Implementation: local design Communicating FSM (CFM)

Synthesis: Bounded (regular) case A CFM is bounded if there is a bound B such that in any reachable configuration, the number of pending messages on any channel is · B. Loop-connected MSC-graph G: syntactical property ensuring boundedness (communication graph of each loop of G is strongly connected)

Bounded case: expressivity Bounded CFM [Mukund, Thiagarajan et al. 00] Loop-connected (C)MSC-graphs Monadic second-order logic over bounded MSCs

Bounded case Loop-connected MSC-graphs can be translated into finite automata, hence they can be model-checked. [M/Peled 99, Alur/Yannakakis 99] Distributed synthesis: from regular MSC language to CFM [Mukund, Thiagarajan et al. 00]

Bounded case: too weak PCPC rcv(P) snd(C) CFM Bounded CFM have low expressivity. Producer/consumer: typical unbounded behavior

Weakly bounded channels PCPC rcv(P) snd(C) R = (P snd(C) C rcv(P))* regular set of representatives: every execution of the CFM has an equivalent execution in R A CFM is weakly-B-bounded if its B-bounded executions build a set of representatives. Def.

Weakly bounded channels What does a weak channel bound mean? Receiving messages can be (fairly) scheduled within channels of some fixed size. Implementations of communication protocols are usually weakly bounded!

Weak bounds: expressivity Weakly-bounded CFM [Genest, Kuske, Muscholl 04] Globally- cooperative CMSC-graphs Monadic second order logic over w-bounded MSC

Weak bounds: main result Globally cooperative CMSC-graph Weakly-bounded CFM Regular set of B-bounded representatives Monadic second-order logic over w-bounded MSC Distributed synthesis

Some proof ideas weakly-2-bounded: P C a b a a b a b b a a b b a b a b a b a b a b, … Compute B-bounded executions by applying special rewriting rules (commutations). [Kuske’s trick] Example:

Weakly bounded CMSC-graphs and Mazurkiewicz traces a b ´ b a  a,a,b,b} alphabet ab ab ab ´ a a b a b b ´ a a b b a b C P a a b M a b b [ab ab ab] ´ Mazurkiewicz trace commutation rules

B-bounded executions a a msg rev lPlP lPlP a b b lClC lClC b rev associates the i-th receive with the (i+2)-th send Process order < P Message order msg Relation rev B-bounded executions = set of Mazurkiewicz traces

Mazurkiewicz Trace Theory: [Zielonka ‘87] Synchr.-communicating automata Start with CMSC-graph (or MSO-formula) such that the set of B-bounded executions is a regular set of representatives Construct an equivalent, weakly-B-bounded CFM. special case of distributed synthesis From regular representatives to CFM

2. Simulate a synchr.-comm. automaton T by a CFM : 1. B-bounded executions: equivalent trace automaton T uses: process order message order rev relation (k 1 ) state k 1 k2k2 k3k3 (k 3 ) k4k4 (k 5,GUESS) k5k5 k6k6 check GUESS = k 2 From regular representatives to CFM

Using trace automata: equivalent CFM up to weakly-B-bounded executions Reject non-weakly-B-bounded MSCs: Given Set of MSCs with regular set of B-bounded representatives. Construct equivalent CFM Construct CFM that controls weakly-B-bounded on-the-fly. From regular representatives to CFM

Asynchronous communication: deadlocks Our implementation of weakly-bounded MSC- graphs has too many deadlocks  Another approach [Genest, Concur’05]: Implement a given regular specification by adding messages (within a fixed architecture). Then: Any specification satisfying the diamond properties is deadlock-free implementable, if choices are always local.

Conclusion Shared-variable case is solved. Communication-based models: solved for language equivalence (modulo deadlocks), but other types of equivalence are even more challenging Weak channel bounds are a reasonable restriction: messages can be scheduled on finite channels

Outlook Deadlocks: find reasonable restrictions on specifications ensuring deadlock-free implementations (Genest’05) Extend the MSC-graph framework by partial views, synthesis from partial views? Open systems: Alternating synchr.-comm. automata (Gastin et al. ’04): special case CFM with uncontrolable processes?