1 PEFP status Jihwa Kim PAL, KOREA EPICS Collaboration meeting Dec 8-10, 2004 RICOTTI,Tokai, JAPAN Pohang Accelerator Laboratory POSTECH Bird’s eye View of the Site

2 I.PEFP  Goal  Plan, Schedule  Status of Accelerator Development  Project progress II. 20Mev Control System  History  Development Status of Sub Control System.Vacuum,RF,Event,Beam Monitor, PS,Utility EPICS Collaboration meeting Dec 8-10, 2004 RICOTTI,Tokai, JAPAN Pohang Accelerator Laboratory POSTECH Outline

3 Pohang Accelerator Laboratory POSTECH Proton Engineering Frontier Project PAL, Pohang KAERI,Deajeon KAERI – Korea Atomic Energy Research Institute KAPRA – Korea Accelerator & Plasma Research Association KIGAM – Korea Institute of Geoscience & Mineral Resources KAIST – Korea Advanced Institute Science and Technolgy Under construction for 20Mev Commissioning in KAERI-Deajeon Collaboration with KAERI, PAL,KAPRA,KIGAM,KAIST. Final Site will be selected by end of this year.

4 Project Goal Refer to Slide materials(Page 3~8)presented at ICFA-HB 2004 October , Beansheim,Germany “Status and progress of the PEFP Project” By Byung-Ho Choi & PEFP Team

5 Plan of PEFP(100MeV Linac & Utilization)

6 Project Schedule

7 Basic Accelerator Parameters

8 Status of Acceleraor Development(Nov. 2002)

9 Project Progress

10 Control System for 20MeV Commissioning Pohang Accelerator Laboratory POSTECH  First Phase Development(2002.7~2003.6). Control System Architecture. Control ToolKit Chioce(EPICS).Vacuum Control System  Second Phase Development(2003.7~2004.6). RF Control System. Event System for Timing Control  Third Phase Development (2004.7~2005.6).Beam Monitor Control.Power Supply Control.Cooling Water Monitoring.Intergration and Commissioning EPICS Collaboration Meeting December 8~10,2004 RICOTTI, Tokai JAPAN Scheduled to 20 MeV commissioning in April 2005 at KAERI,Deajeon Development of Control System to satisfy this mission has been executed at PAL in 3Phases for last 3 years.

11 Ralph Langer BESSY,Berin,Germany July 28~August 5,2004 EPICS Lab. At PAL Pohang Accelerator Laboratory POSTECH EPICS Expert Invitation for Review Bob Dalesio LANL,USA May 27 ~31,2003 Seminar room at PAL EPICS Collaboration Meeting December 8~10,2004 RICOTTI, Tokai JAPAN

12 Pohang Accelerator Laboratory POSTECH Vacuum Control System EPICS Collaboration Meeting December 8~10,2004 RICOTTI, Tokai JAPAN Windows based PC RS422 Interface(63 Ports) EPICS base MEDM Installed and Working at KAERI site

13 Pohang Accelerator Laboratory POSTECH RF Control System EPICS Collaboration Meeting December 8~10,2004 RICOTTI, Tokai JAPAN 10MHz, Sine x x x x 1 5 E e 2 x RF & CLOCK GENERATOR FIELD/RESONANCE CONTROLLER LOW LEVEL CONTROLLER (StrongARM CPU & FPGA) KLYSTRON AMPLIFIER KLYSTRON POWER SUPPLIES PROGRAMMABLE LOGIC CONTROLLER ETHER-NET HUB TIMING, RTDL(?) T0, RF GATE SOLID STATE AMPLIFIER RF_PAL PEFP VOLTGE CONTROLLER (8CHs) DISPLAY, MONITOR & CONTROL(FP) Low Level RF PULSE MODULATOR RFQ A B 1xx x x 1 x7x 1x t h A 1x 6 x x 1x 4x 11x x 7x 1x C LLRF(4U SUBRACK) ETHER-NET LINE RS232 or 485 Multi-Connected directly Wire Connected Down Conversion & Distribution Coupled RF (Fwd, Ref. Cavit, etc.) RF (350MHz) LO (340MHz) Clock SBC MFS VME based IOC MVME5100 SUN workstations Ethernet EPICS IOC(Developed) CPU : MVME5100 VME I/O: MFL32A EPICS Base

14 VMEbus MFL32A 500W(+5V,-12V,+12V).12 slots, VME64x with P0 Remote Control(RS422,LAN) VME Bus Subrack Pohang Accelerator Laboratory POSTECH Human CC,INC VME Tech,INC Domestic Products EPICS Collaboration Meeting December 8~10,2004 RICOTTI, Tokai JAPAN 16bits ADC,0~+10V :8Ch 16bits DAC,0~+10V:2Ch DIO:32Ch 10/100Base T Ethernet RS232C,32bit CPU

15 -Development Progress. Detailed Specification. System Configuration Layout. Hardware Setup and Software module Test. Lab Test Pohang Accelerator Laboratory POSTECH Timing Control EPICS Collaboration Meeting December 8~10,2004 RICOTTI, Tokai JAPAN Event system for timing control has been selected. TIMO from SLS made contribution.

16 Tank 1 DT : 51 L=444.5cm E=7.2MeV CT BPPM Tank 2 DT : 39 L=465.5cm E=11.5MeV Tank 3 DT : 33 L=475.8cm E=15.8MeV Tank 4 DT : 29 L=444.5cm E=20.0MeV CT BPPM Beam Stop BPPM #3BPPM #4 RFQ DCCT #1 DCCT #2 CTBPPM Button Signals EPICS VME IOC crate BPPM Low-level Electronics crate#2 BPPM #1 BPPM #2 BPPM Low-level Electronics crate#1 CPUADC#1 ADC#2 Ethernet EPICS IOC(Developing) CPU : MVME5100 ADC#1 : VTR812/10 ADC#2 : AVME EPICS Base Pohang Accelerator Laboratory POSTECH BPM/DCCT Control System(Third Phase) EPICS Collaboration Meeting December 8~10,2004 RICOTTI, Tokai JAPAN Low Level Electronics(Working) -Bergoz Customized Hardware module

17 Pohang Accelerator Laboratory POSTECH EPICS Collaboration Meeting December 8~10,2004 RICOTTI, Tokai JAPAN Power Supply Control System for DTL_Q #1 PS EPICS VME IOC CPU IP Carrier IP TM IP #2 PS #35 PS #42 PS (5Ea) Fiber Optic IP:Industry Pack TM:Transition Module DSP:Digital Signal Processing ADC:Analog Digital Converter PS:Power Supply Pack Simulation Board With Power Supply Intf. With Controller Control Team PEFP CPU : MVME5100 (Digital Power Supply) Selected the SLS Power Supply Type. H/W Modules are delivered & setting them up

18 Pohang Accelerator Laboratory POSTECH EPICS Collaboration Meeting December 8~10,2004 RICOTTI, Tokai JAPAN Still gathering information for Utility Utility Control(Cooling Water)

19 Pohang Accelerator Laboratory POSTECH EPICS Collaboration Meeting December 8~10,2004 RICOTTI, Tokai JAPAN Main Control Screen for PEFP

20  PEFP  Final Site will be selected by end of this year.  20Mev Control System for PEFP IOC Level  RF (Developed)  Vacuum (Developed)  Event System for Timing Control (Developed)  Beam Monitor (Developing)  Power Supply(Developing)  Utility(Still gathering control requirement) OPI  MEDM Switch to EDM  Channel Archiver(From Kay)  More things..  EPICS Training to PEFP Physicist, Engineer Pohang Accelerator Laboratory POSTECH EPICS Collaboration Meeting December 8~10,2004 RICOTTI, Tokai JAPAN Summary & Plan