History of 64-bit Computing: AMD64 and Intel Itanium Processors Brett Casbeer, Adam Kenny, Chris Kopek, Nick Snead

64-bit History “640K ought to be enough for anybody” – Bill Gates 64-bit twice as fast as 32-bits? Benefits of 64-bit technology Applications of 64-bit technology

AMD64 Outline AMD Athlon 64 Specifications Operating Modes Register overview DDR controller and Hypertransport

AMD Athlon 64 Specifications Infrastructure Socket 754 Number of Transistors 105.9 million 64-bit Instruction Set YES 32-bit Instruction Set YES System Bus Technology Hypertransport Integrated DDR Controller YES On-Chip Cache L1: 128KB L2: 512KB-1024KB Clock-Speed 1.8Ghz-2.4Ghz

AMD64 Operating Modes

AMD64 Register Overview

Reduce Bottlenecks DDR Memory Controller Hypertransport Built into CPU Saves Time Hypertransport Transport Speeds Data packets

Intel Itanium Outline Itanium Processor Specifications Itanium Features Itanium Epic Architecture IA-64 Instruction Set IA-64 vs. IA-32

The Itanium Processor

The Itanium Processor Designed for 1-4000 processor workstations and servers. Level 3 bus designed for communication between processors Level 2 cache reduces traffic Page sizes from 4KB-256MB

Itanium: EPIC Architecture Explicitly Parallel Instruction Computing Allows processor to run instructions parallel to other instructions Instructions “bundled” during the compiler stage No size limit for the groups of “bundled” instructions

IA-64 Instruction Set Source Code: if (x == 4) { z = 9; } else z = 0; Using the IA-32 bit architecture the instruction follow this scheme: Compare x to 4 If not equal goto line 5 z = 9 goto line 6 z = 0 // Program continues from here

IA 64 vs IA 32 architecture IA-32 bit architecture instruction flow: Compare x to 4 If not equal goto line 5 z = 9 goto line 6 z = 0 // Program continues from here IA-64 bit architecture instruction flow: Compare x to 4 and store result in a predicate bit (we'll call it P) If P==1; z = 9 If P==0; z = 0

Conclusion AMD64 Operating Modes Registers Reduce Bottlenecks Long Mode, Legacy Mode Registers GPRs, XMM, RIP Reduce Bottlenecks DDR Controller, Hypertransport

Conclusion Intel Specifications and Features EPIC Architecture Parallel Computing, Bundled Instructions IA-64 Instruction Set IA-64 vs. IA-32