1 Fundamental of Computer Suthida Chaichomchuen : SCC

2 Computer Components n Hardware (architecture) n Software (instruction set)

3 Basic Hardware n Bits n Bytes n Registers n Memory n Processor n Data Bus

4 Hardware Components n Internal hardware –Microprocessor –Memory –Registers n External hardware –Input/Output Devices

5 Software Organization n Programs n Data files n Operating System

6 Computer storage n Bit –On : 1 –Off : 0 n Byte –data : 8 bits –parity : 1 bit (automatically setting)

7 Related bytes n Word n Doubleword n Quadword n Paragraph n Kilobyte n Megabyte

8 Binary numbers Bit value : Position value : Bit number :

9 Binary arithmetic Decimal Binary Decimal Binary

10 Negative Binary Numbers Number +65 : Reverse the bits : Add 1 : 1 Number -65 : Reverse the bit value and add 1

11 Hexadecimal Representation Binary : Decimal : Hexadecimal : B 9 C E

12 System Unit n A system board –Microprocessor –ROM –RAM n Power supply n Expansion slots

13 Processors (Intel family) n 8088/80188 n 8086/80186 n n n n Pentium (or 80586) n PentiumPro (or 6x86)

14 Processors : 8088/80188 n 16-bit registers n 8-bit data bus n address up to 1 million bytes of memory n registers process 2 bytes/time n data bus transfer 1 byte/time n operate in real mode

15 Processors : 8086/80186 n 16-bit registers n 16-bit data bus & run faster n address up to 1 million bytes of memory n registers process 2 bytes/time n data bus transfer 2 bytes/time n operate in real mode

16 Processors : n 16-bit registers n 16-bit data bus & run faster n address up to 16 million bytes of memory n operate in real mode or protected mode

17 Processors : n 32-bit registers n 32-bit data bus n address up to 4 billion bytes of memory n operate in real mode or protected mode

18 Processors : n 32-bit registers n 32-bit data bus n address up to 4 billion bytes of memory n operate in real mode or protected mode n processor is designed for enhanced performance

19 Processors : Pentium (or 80586) n 32-bit registers n 64-bit data bus n execute more than one instruction/clock cycle

20 Processors : PentiumPro (or 80686) n advances the capacity of registers and the data bus –connected to a build-in storage cache by a 64-bit wide bus

21 Logical Units in Processor n Bus Interface Unit –Manage the bus control unit, segment registers and instruction queue. –Provide access to instructions. n Execution Unit –Execute instructions and get data that the BIU delivered.

22 Internal Memory n ROM (Read Only Memory) n RAM (Random Access Memory)

23 Map of Base Memory 64K base system ROM 192K memory expansion area (ROM) 640K memory (RAM) conventional memory upper memory 128K video display area (RAM) Start Address DecHex 960KF KC KA0000 zero00000 Purpose

24 Addressing data in memory n System stores the data in memory in reverse-byte sequence : –low-order byte : low memory address –high-order byte : high memory address

25 memory Address 7613 most significant byte register Address 7612 least significant byte Addressing data in memory

26 Segments A segment is a special area defined in a program that begins on a paragraph boundary, that is, at a location evenly divisible by 16, or hex 10.

27 Main Segments n Code Segment –contains the machine instructions that are to execute n Data Segment –contains a program’s defined data, constants, and work areas.

28 Main Segments... n Stack Segment –contains any data and addresses that you need to save temporarily or for use by your own “called” subroutines.

29 Segment Boundaries Stack Segment Data Segment Code Segment Memory Relocatable in memory Address SS DS CS Segment Registers

30 Segment Offsets n Offset is the distance in bytes from the segment address to another location within the segment. n A 2-byte offset can range from 0000H - FFFFH (0-65,535). n Memory location = segment address + offset value

31 Offset 32H X Segment address 038E0H X... DS segment address :038E0H Offset :+0032H Actual address : 03912H Segment Offsets

32 Addressing Capacity n 8086/8088 Addressing –16 bits for addressing n Addressing –24 bits for addressing n 80386/486/Pentium Addressing –In protected mode use 48 bits for addressing

33 Registers The processor’s registers are used to control instructions being executed, to handle addressing of memory, and to provide arithmetic capability.

34 Registers n Segment Registers n Pointer Registers n General-Purpose Registers n Index Registers n Flags Register

35 Segment Registers n CS register –Contains the starting address of a program’s code segment. n DS register –Contains the starting address of a program’s data segment.

36 Segment Registers... n SS register –The system stores the starting address of a program’s stack segment in the SS register. n ES register –Used by some string operations to handle memory addressing.

37 Segment Registers... n FS and GS register –Additional extra segment registers on the and later processors.

38 Pointer Registers n Instruction Pointer (IP) register –Contains the offset address of the next instruction that is to execute. –IP indicates the current instruction within the currently executing code segment.

39 Pointer Registers... n Stack Pointer (SP) register –Refers to the current word being processed in the stack. n Base Pointer (BP) register –Facilitates referencing parameters.

40 General-Purpose Registers n AX register : Accumulator –Used for operations involving input/output and most arithmetic. EAX: AX:AHAL

41 General-Purpose Registers n BX register : Base register –Used as an index to extend addressing. EBX: BX:BHBL

42 General-Purpose Registers... n CX register : Count register –Contains a value to control the number of times a loop is repeated. –Contains a value to shift bits left or right. ECX: CX:CHCL

43 General-Purpose Registers... EDX: DX:DHDL n DX register : Data register –Used for input/output operations –Used for multiply and divide operations that involve large values.

44 Index Registers n SI register –source index register is required for some string operations –SI is associates with DS register n DI register –destination index register is required for some string operations –DI is associates with ES register

45 Flags Register Flag:O D I T S Z A P C Bit no.:

46 Flags Register n OF (overflow) –Indicates overflow of a high-order bit following arithmetic. n DF (direction) –Determines left or right direction for moving or comparing string data. n IF (interrupt) –Indicates that all external interrupts are to be processed or ignored.

47 Flags Register... n TF (trap) –Permits operation of the processor in single-step mode. n SF (sign) –Contains the resulting sign of an arithmetic operation. –0 : positive / 1 : negative

48 Flags Register... n ZF (zero) –Indicates the result of an arithmetic or comparison operation. –0 : nonzero / 1 : zero n AF (auxiliary carry) –Contains a carry out of bit 3 on 8-bit data, for specialized arithmetic.

49 Flags Register... n PF (parity) –Indicates even or odd parity of a low- order 8-bit data operation. n CF (carry) –Contains carries from a high-order bit following an arithmetic operation. –Contains the contents of the last bit of a shift or rotate operation.