Source: Lundstrom/Fossom/Yang/Neudeck, Purdue EE612 lecture notes.

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Source: Lundstrom/Fossom/Yang/Neudeck, Purdue EE612 lecture notes

depletion region thick body Source: Lundstrom/Fossom/Yang/Neudeck, Purdue EE612 lecture notes

depletion region Thin body Source: Lundstrom/Fossom/Yang/Neudeck, Purdue EE612 lecture notes

Partially Depleted vs. Fully-Depleted Recall that depletion region empty of free carriers forms in the BULK beneath the gate Partially-depleted SOI –The body is thicker than the depletion region, so bulk voltage can vary depending on the amount of charge present –This varying charge changes Vt because of the body effect Fully-depleted SOI –Body is thin, depletion region spans bulk –Body charge is fixed, body voltage does not change –Harder to make because of thin body

Another View Source: Weste/Harris

Source: Lundstrom/Fossom/Yang/Neudeck, Purdue EE612 lecture notes

CMOS Latchup Source: Weste/Harris Transient currents flowing in substrate during startup can cause VSUB to rise, turning on Vsub. This will turn on Vwell, which turns on Vsub harder in a positive feedback loop, causing large current to flow between Vdd/GND (destructive current!). Keep Rwell, Rsub low, also place numerous well taps to collect stray charge.

Source: Lundstrom/Fossom/Yang/Neudeck, Purdue EE612 lecture notes

Alpha Particles Sources –Cosmic Rays (aircraft electronics vulnerable) –Decaying uranium and thorium impurities in integrated circuit interconnect Generates electron-hole pairs in substrate –Excess carriers collected by diffusion terminals of transistors –Can cause upset of state nodes – floating nodes, DRAM cells most vulnerable

Source: Lundstrom/Fossom/Yang/Neudeck, Purdue EE612 lecture notes Not as much substrate to generate charge in!

Source: Lundstrom/Fossom/Yang/Neudeck, Purdue EE612 lecture notes

Devil’s advocate.... Took a long time..first main commercial success was IBM PowerPC in The biggest advantage.This is a problem!

Another subtle advantage: Lower Vt In bulk-CMOS, Vt varies with channel length –variations in polysilicon etching shows up as variations in threshold voltages –Vt must be high enough in the worst case (lowest Vt) to limit subthreshold leakage, so nominal threshold must b higher SOI has lower Vt variations than bulk-CMOS –So nominal Vt can be lower, resulting in faster circuits, esp. for lower VDD

Source: Lundstrom/Fossom/Yang/Neudeck, Purdue EE612 lecture notes

Body is floating.

Source: Lundstrom/Fossom/Yang/Neudeck, Purdue EE612 lecture notes

Charge Entering/Exiting the Body Entering –Leakage currents from reversed biased drain-to-body diode (also possibly source-to-drain) –High-energy carriers cause impact ionization, creating electron- hold pairs. Some electrons injected into gate oxide, causing holes to accumulate in body. Modeled as current source Iii. Exiting –As body voltage increases, diode source-to-body becomes forward biased, allowing charge to exit. –A rising gate or drain capacitively couples body upward as well. Can strong forward bias source-to-body diode and cause charge to rapidly leave the body. Source: Weste/Harris

Source: Lundstrom/Fossom/Yang/Neudeck, Purdue EE612 lecture notes

SOI Disadvantages Floating body causes the History Effect –Body voltage depends on if device has been idle or switching –This changes Vt, which changes the delay of the circuit –Circuit delay changes with its “history” of switching activity! –Matches matching transistors for analog designs difficult because even if transistors are next to each other, can have different characteristics because of changing VT Self-heating –The oxide is good thermal insulator as well as electrical insulator –Heat accumulates in switching transistors rather than spreading throughout the substrate, slow them down. –A problem for large transistors that switch fast, i.e, clock buffer transistors.

SOI Applications The immunity to latch-up, resistance to alpha- particle strikes makes SOI attractive for space- based ICs, military applications seeking radiation hardness –Honeywell is a leader in CMOS SOI for military, space applications Smaller diffusion capacitance makes it attractive for low-power design (lowers dynamic power dissipation)