Lecture 1b - Review Kishore C Acharya

2 Building Semiconductor Devices To build semiconductor devices # of carriers present in the semiconductor must be increased by adding impurities from Group III and Group V elements from periodic table Typical impurities –Group III: Boron –Group V: Phosphorous

3 Increasing Carrier concentration by Doping np = n i 2 –n- elrctron concentration, p- hole concentration –n i = Intrinsic carrier concentration=10 10 /cc for silicon For N type semi conductor –n = Nd donor concentration [10 14 to /cc] – majority carrier –p = n i 2 /Nd – minority carrier For P type semi conductor –p = Na acceptor concentration [10 14 to /cc] – majority carrier –n = n i 2 /Na – minority carrier

4 Energy Levels of Silicon Ec = Edge of conduction band Ev = Edge of Valence band Efp = Fermi Level for P type Efn = Fermi Level for N type Eg = Energy gap kT = eV at T = 300º K Ln(10) = 2.3

5 Fermi Level Calculation Example For Silicon ni = /cc For P type Semiconductor let Na = /cc Efp = Ec + Eg/2 + kT Ln(ni/Na) At t = 27º C, T = 300º K Efp = Ln(10 10 / ) = eV

6 Fermi Level Calculation Example For Silicon ni = /cc For N type Semiconductor let Nd = /cc Efn = Ec + Eg/2 + kT Ln(Nd/ni) At t = 27º C, T = 300º K Efn = Ln(10 16 / ) = eV

7 MOS Diode Structure Vint = (Efm – Efs)/q, Vint =0 once thermodynamic equilibrium is achieved Vint readjust the charge distribution so that Efm = Efs, where Efm and Efs are the Fermi Level of metal and semiconductor respectively

8 Metal Selection Typical –Aluminum (Al), Ef = -4.1 eV –N + poly silicon, Ef = eV Newer Material –For N type: Select Efn =  0.2 eV titanium, tantalum, zirconium, and hafnium –For P type: Select Efp =  0.2 eV platinum, palladium, nickel, cobalt, and ruthenium

9 Ideal MOS Diode( Efm = Efp) Difficult to find Matching Metal so that Efm = Efp Vdiode = 0

10 Electron Accumulation for Vdiode >0 (Inversion)

11 Hole Accumulation for Vdiode<0 (Depletion)

12 Real MOS Diode Real MOS Diode Efm  Efp Vint = Efm – Efs generates fields that readjusts charge distribution so that Vint = 0 After Equilibrium Efm = Efp Since Efm went down, it is similar to applying a positive Voltage to the metal side. Electrons accumulated at the surface and the band on the semiconductor side became curved

13 Real MOS Diode Wfm > Wfn

14 For Conduction Vs > 0 & Vgs  Vt a negative threshold voltage about –1v This gate voltage is necessary to create a P channel under the oxide layer

15 For conduction Vd < 0 and Vgs  Vt a positive threshold voltage about 1v This gate voltage is necessary to create a N channel under the oxide layer

16 Carrier and Current flow in MOS Transistors

17 Minimum Size MOS Transistor Is called the technology parameter = L/2. All sizes are integer multiple of Bulk or Substrate Active Region Channel

18 Condition for Conduction Bulk must be reverse biased –Direct connection (P to Gnd, N to Vdd) –Connect bulk to one active which becomes source and proper source connection will reverse bias bulk Channel must be created under the oxide layer –Apply a gate voltage of proper polarity exceeding a threshold Circuit must be connected so that current flow is consistent with carrier flow

19 Quantitative criteria for conduction For NMOSFET –Vds = Vd – Vs > 0 –Vgs = Vg – Vs  Vtn(Vtn > 0, Typical 1V) –Vbs = Vb – Vs  0 For PMOSFET –Vds = Vd – Vs < 0 –Vgs = Vg –Vs < Vtp(Vtp < 0, Typical –1 V) –Vbs = Vb – Vs  0

20 Circuit Symbol Bulk (P) Gate Source/Drain Drsain/Source Gate Bulk (N) Source/Drain Drsain/Source NMOSFET Bulk is P Channel is N Leakage current (P to N) Bulk to Channel PMOSFET Bulk is N Channel is P Leakage current (P to N) Channel to Bulk Channel (N)Channel (P)