ADDERS Half Adders Recall that the basic rules of binary addition are as indicated below in Table 2-9. A circuit known as the half-adder carries out these basic operations. The half-adder, illustrated in next slide, accepts two binary digits and produces the sum and carry digits.

Adders Half Adder A+B Sum Carry 0+0 0+1 1 1+0 1+1

Half ADDER

Half ADDER Observe from Table 2-9 that we may derive logical expressions for the Sum (S) and carry output (CO) bits. Namely,     CO = AB, and . From these two expressions, the implementation of the half-adder function is developed as illustrated in next slide

Logic Circuit for half-adder

Full Adder The second basic category of adder is the full-adder. This combinational circuit performs the arithmetic addition of three input bits. The noticeable difference between the full- and the half-adder is the ability of the former to handle input carries (CI). The logical symbol for the half-adder is shown in earlier slides and the associated truth table in earlier table.

Truth Table for FA A B Cin  Co 1

FULL ADDER

FULL ADDER By the very nature of the full adder we know that the two input bits must be added to the carry input bit. Recall that for the half-adder the sum of A and B is the XOR of those two variables,. Similarly, for the three variables A, B and CI the sum becomes . This is illustrated in next slide

FULL ADDER SUM Values

FULL ADDER

Two Half ADDER