Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 1 Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design Course and contest Results of Phase 1 Robert Mars, Andy Schellin

Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 2 Basic Component Full-Adder Gate-Level18 transistors vs. 30 transistors  Transistor count becomes important on ASIC

Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 3 Basic Component Ripple-Carry-Adder Simplest Carry Propagate Adder(CPA) to replace “+” Enhancements: Partitioning into smaller groups Use Half-Adder for first gate since there is no Carry-Input Tree structure Introduce Pipeline Stages to improve throughput

Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 4 Basic Component Multiplier Two different implementations Adding partial products in CPA-Tree Braun-Array multiplier Enhancements: CSD-Recoding to reduce partial products Using redundant digit system Problems: Buffered output of multiplier contains ‘X’(unknown) values  calculation of attenuation corrupted Handle signed values  solution: Pezaris-Array Multiplier

Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Basic Component Solution: add registers between multiplier output and adder input Slide 5 Multiplier Problem

Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Results Mandatory values for FGPA Frequency f MHz Area A (# of LUT-FF Pairs) 5761 # Pipeline Stages0 Metric Slide 6

Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Thank you for your attention Slide 7