Configuration Solutions Overview October 1999 Frank Toth Xilinx, San Jose F. Toth CPLD 10/99 Page1

Agenda Industry Trends Mission & Goals Support for all platforms & devices ATE & JTAG Tool Alliances JTAG Instruction Support Xilinx JTAG Tool Roadmap F. Toth CPLD 10/99 Page2

PLD Industry Trends Use of ISP devices and JTAG is increasing dramatically over the past 18 months PLD manufacturers starting to offer second and third generation (Xilinx) ISP solutions JTAG is playing and ever increasing role Fixes the problem of “hard to get at” device test & programming Xilinx leading with IEEE 1532 (new JTAG) focus: Adding instructions and features to JTAG New system design thinking: Internet Reconfigurable Logic (IRL)- based on networking infrastructure & Java JTAG after 10 years of use and development in the industry has come into its own over the past 18 months driven by 2 forces (1) Smaller device footprints making testing and programming more difficult (2) The need for reducing overall manufacturing costs by using JTAG for debug along with the traditional ATE "bed of nails" support. ISP has been available for about 4 years now and several manufacturers have developed second and third generation devices that are now either sampling or in production. Xilinx is heading up the 1532 committee which is specifically focused on device enhancements (silicon) to allow for easier in system programming. Customers are looking at PLDs in a different way: Using PLDs to both extend overall product life by using field upgrades (network or internet reconfigurable logic) F. Toth CPLD 10/99 Page3 3

Configuration Solutions Mission & Goals Bullet Proof Device Programming & Download Easy to use, debug, deploy: JTAG & Xilinx Serial Modes Complete Life Cycle Support Design, Prototyping, Production, Upgrade & IRL Full Support All Xilinx Devices (FPGA, CPLD, ISP-PROM) Support All Download Modes JTAG, Serial Slave & SelectMAP, Embedded Processor Create and support Industry Standards 1149.1 (JTAG), 1532 (New ISP Standard), Java, JEDEC STAPL Configuration solutions wants to make sure that the customer’s experience with download support (either downloading bitstreams in serial mode or to JTAG devices) is seamless and easy to do. Xilinx supports all the different modes including JTAG and the proprietary serial downloads: Slave serial and the 8 bit wide high speed SelectMAP modes, These modes support the customers product life cycle from prototyping all the way through field upgrade. Xilinx not only supports Industry standards (STAPL and SVF for example) but DRIVES industry standards like our current work on the 1532 committee. Xilinx has been an innovator in the remote reconfigurable products with IRL. F. Toth CPLD 10/99 Page4

Configuration Solutions All Platforms CPLD Alliance & Foundation Tools ATE FPGA SVF / STAPL & Java support for: HP Teradyne Genrad All Devices JED BIT ISPROM Embedded Controllers JTAGPROG & HARDWARE DEBUGGER SVF STAPL Java C code examples STAPL file convertor Java VM support Xilinx provides programming support across all platforms for all products-CPLD, FPGA and ISPROM. Platforms include PCs and workstations, where one of three cables: Serial, parallel or our new MultiLINX cable is used to program the devices. Programming can either take place through the Xilinx proprietary serial mode or through the 4 wire JTAG port. To assure that total product life cycle support is provided Xilinx also offers support for three other platforms: 1.) Automatic Test Equipment(ATE) with the three major vendors HP3070, Genrad and Teradyne; 2) Embedded controllers with C-code available for porting to the 8051 microprocessor (or any other processor with small code modifications); and 3.) Third party JTAG tools like those from Goepel, Corelis, and ASSET as well as programmers from BP Microsystems and Data I/O. Third Party Tools & Programmers All Cables Alliances with Third Party JTAG Tool Vendors Focus on Data I/O & BP Microsystems programmers Prototype & Production platforms Serial and Parallel download cables MultiLINX Cable F. Toth CPLD 10/99 Page5

JTAG Support Across All Platforms Automatic Test Equipment Real-time Operating Systems with JAVA virtual machines JTAG Debug & Programmers Xilinx supports all of the brand name platforms shown above with JTAG support either through traditional SVF support, C code or though JavaScan (API for boundary scan) mode. F. Toth CPLD 10/99 Page6

JTAG Tool Alliances Mutual support alliances with JTAG Tool Suppliers that have established relationships with Xilinx Major Customers: ASSET- (EMC, Cisco) Goepel- (Alcatel, Barco, Nokia) Corelis- (Nortel, Boeing, HP) JTAG Tech (Philips, Bay Networks) Customer Benefits: Timely & complete customer support of all devices Xilinx FAE support/ familiarity with JTAG concepts & leading JTAG tools Timely device support & website access / download Xilinx has multiple long term alliances with major tool vendors matched to our appropriate major customers. Benefits to our customers include timely support for all of our devices when the devices first become available; Xilinx FAE familiarity with both the concepts and operation of JTAG as well as some of the more popular tools like those shown above assures customers have access to the best solutions possible; Xilinx also has an FTP and web download site where that latest device files can be easily downloaded. F. Toth CPLD 10/99 Page7

Configuration Solutions Tool Roadmap iMPACT Hardware Debugger Download Software JTAG programmer MultiLINX Cables Xchecker (serial) Xilinx roadmap current includes enhancing existing tools (JTAG PROG & Hardware debugger) to improve robustness and allow for more functionality including chain integrity tests and other functions These two tools will be merged together into one easy to use tool known as iMPACT with a new GUI which will make downloading and programming a single operation regardless of the techniques used:whether JTAG or serial Xilinx has introduced a new high performance cable called MultiLINX that can program a 1 million gate device in less than one second Parallel Download Cable 1Q01 Today 1Q00 F. Toth CPLD 10/99 Page8

Configuration Solutions Roadmap Today 1Q00 1Q01 Update Virtex JTAG 1532 Compliant New FPGAs & CPLD Silicon Config Software iMPACT : New Tool Combining JTAGPGMR & HWDBGR New device updates for JTAG Programmer & Hardware Debugger Ease of use enhancements to JTAGPGMR & HWDBGR Configuration encompasses three different aspects: 1.) Enhancement to the silicon to accommodate the latest JTAG instructions and standards; 2.) Enhancements to Xilinx configurations software to insure that it is easy to use and contains system and “chain integrity” troubleshooting tools; and 3.) Easy to use updates from the web. One of our goals is to keep the customer informed as much as possible, through the use of push emails (based on customer registrations for more info) about any new device files, new configuration tools and upgrades, and new JTAG tools that may be of interest. Xilinx also has an effort underway to combine the JTAG tool (JTAG programmer) and the hardware debugger (serial bitstream download) into one tool called iMPACT. In the meantime, improvements to the existing tools are underway and will include enhancements to test chain integrity as well as manage files. Updates/ Web V2.1 support for Virtex, XC9500XL/XV, & Spartan “PUSH” email device updates for customers Programming applets F. Toth CPLD 10/99 Page9

JTAGProgrammer 1Q2000 Enhancements No BSDL required for 3rd party devices Read-back support for all FPGA devices Enriched system debug operations- chain integrity and robustness GUI enhancements including visual success and failure programming indications 1Q2001 Unified download tool supporting all Xilinx devices in all modes using one interface. One of the newest enhancement to the JTAG tool is the elimination of the need for an actual BSDL file for device programming. In addition JTAG readback (for verification) of the download bistream through the JTAG port. Tests to insure the JTAG chain is connected and that the chain is robust as well as enhancements to the GUI to indicate what is going on during programming. This should eliminate the need to look at a long error message to determine what went on during the various operations. F. Toth CPLD 10/99 Page10

Xilinx ISP/JTAG Silicon: JTAG Instruction Support XILINX MANDATORY (for new products) This chart shows the various JTAG instructions implemented in Xilinx silicon. As you can see the newer devices incorporate more instructions than required by the JTAG spec including instructions like CLAMP that set the output to a specified value (1 or 0) and HIGH Z which places the outputs in a high impedance state to insure that the device does not affect any other parts of the system during programming. * Two user-definable instructions available F. Toth CPLD 10/99 Page11

New IEEE Std 1532 IEEE Std 1149.1-based ISP Standardization- Next generation ISP using JTAG- One tool-all devices Easy to use ISP regardless of device architecture (manufacturer) Concurrent & interleaved programming Incorporated into future Xilinx product families: Virtex, Spartan and CPLD Incorporates “enhanced” BSDL-based algorithm description- no other files needed Xilinx chairs committee: Neil Jacobson 1532 ISP JTAG 1149.1 A new IEEE standard known as 1553 is being defined as we speak. This new standard improves and augments the current capabilities and performance of JTAG specifically for in system programming. It uses an enhanced BSDL file to allow for easy ISP programming of each device. regardless of the internal architecture or manufacturer, and allows for easy concurrent or interleaved programming. Neil Jacobson chairs the committee and the specification is under development. This new enhanced capability will be incorporated into all new Xilinx device families: Virtex, Spartan and CPLDs. F. Toth CPLD 10/99 Page12

Xilinx Configuration Solutions web page contains all the information you need to understand all the different aspects of JTAG and download various tools. The Java API for boundary scan section contains detailed information on Java, a downloadable API for boundary scan, and pointers to various other websites (including Sun) to download free Java code to be able to program devices using Java directly from your PC. All Xilinx download software (JTAG programmer and hardware debugger) are accessible from the desktop download section. Embedded C code and applications notes are available under the Embedded software solutions. Everything you ever wanted to know about JTAG is located under ISP Standards and Specifications. The ATE section has translators for all major board level test ATE manufacturers. The programming solutions section lists all the popular stand alone programmers (DATA I/O and BP Micro for example) as well as just about every programmer manufacturer. Popular third party JTAG boundary scan tools (Goepel, ASSET, JTAG Tech, etc.) are listed under the Third Party Tools Section including pointers to the manufacturers websites. The cable section lists the various Xilinx cables including our new MultiLINX high speed cable that hooks to a PC USB port and can download to a 1 million gate Virtex device in less than 1 second. Customers wanting to Register for further Algorithm Change Notice Updates can also do so on this page. F. Toth CPLD 10/99 Page13