HC08 ARCHITECTURE DETAILS

MC68HC08 Architecture Details MC68HC08 Family Nomenclature Variations Block Diagram Pins Memory Map

MC68HC08 Nomenclature MC 68 HC 7 08 XL 36 XX B/FU 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1. Qualification Status: PC - no qual. XC - limited qual. MC - full qual. 2. Historic reasons. The 68 references Motorola’s first micro-processor, the MC6800. All architectures are based of this device. 3. Speed/Power: H - High Speed C - 5.5V L - 2.0V 4. Memory type: Blank - ROM/ROMless 7 - EPROM/OTP 8 - EEPROM 5. CPU type: 08 6. Family and Member Indicators: X - Family L- Member 7. ROM Size: 36 KBytes ROM 8. Temperature range: Blank - (0 to 70C) C - (-40 to 85C) M - (-40 to 125C) 9. Package Type: B - SDIP FU - QFP

MC68HC08 Family Codes MC68HC708XL36FU A Automotive N Gen. purpose (52/56 pin) B Gen. purpose (16/20 pin) O -- avoided -- C Consumer P PC D DSP Q Future gen. purpose/cpu ext. E Gen. purpose (28/32 pin) R Future gen. purpose/cpu ext. F Telephone S Smartcard G Gen. purpose (40/42/44 pin) T Television H Future gen. purpose/cpu ext. U -- avoided -- I -- avoided -- V VFD J Future gen. purpose/cpu ext. W Future gen. purpose/cpu ext. K Fuzzy (knowledge based) X Gen. purpose (56/64/68 pin) L LCD Y Gen. purpose (80 pin) M Motor control Z Gen. purpose (100-132 pin)

MC68HC08 Member Codes MC68HC708XL36FU A Multifunction timer parts M Other (A/D, etc) B “ N “ C “ O “ D General timer parts P “ E “ Q “ F “ R “ G General timer + serial interface S Non-volatile memory + anything H “ T “ I “ U “ J “ V “ K “ W “ L “ X “ Y “ Z “

New 68HC08 Introductions 68HC08AS20 68HC08LN56 ROM EPROM FLASH 68HC08AZ0 68HC08AZ16 68HC08AZ24 68HC08AZ32 68HC08AB0 68HC08AB16 68HC08AB24 68HC08AB32 CAN Auto./Ind. M o t r C n l Gen. Purp. J1850 Consum. Comm. General Purpose 68HC08MR16 68HC908AT32 68HC708XL36 68HC708AS48* *-Prototyping Qty. Only 68HC08XL36 68HC908XL36 68HC708LN56 68HC708MP16

MC68HC708XL36 Block Diagram INTERNAL BUS M68HC08 CPU PTA7 – PTA0 CPU ARITHMETIC/LOGIC REGISTERS UNIT (ALU) DIRECT MEMORY ACCESS MODULE PTB7 – PTB0 CONTROL AND STATUS REGISTERS — 88 BYTES BREAK MODULE USER EPROM — 36,864 BYTES PTC7 – PTC0 LOW-VOLTAGE INHIBIT MODULE USER RAM — 1024 BYTES COMPUTER OPERATING PROPERLY PTD7/KBD7 – PTD0/KBD0 MONITOR ROM — 240 BYTES MODULE PTE7/TCH3 USER EPROM VECTOR SPACE — 32 BYTES PTE6/TCH2 TIMER INTERFACE MODULE PTE5/TCH1 PTE4/TCH0 OSC1 CLOCK GENERATOR PTE3/TCLK OSC2 MODULE PTE2/TxD CGMXFC SERIAL COMMUNICATIONS INTERFACE MODULE PTE1/RxD PTE0 PTF5 RST SYSTEM INTEGRATION PTF4 MODULE PTF3/MISO SERIAL PERIPHERAL INTERFACE PTF2/MOSI IRQ1 /V IRQ MODULE PP PTF1/SPSCK IRQ2 MODULE PTF0/ SS POWER-ON RESET MODULE PTG3 – PTG0 (64-PIN PACKAGE ONLY) V SS V DD V DDA POWER PTH3 – PTH0 (64-PIN PACKAGE ONLY) CGND/EVss

Overview of Pin Functions BASIC SUPPORT PINS VDD , VSS Power (+5V) and Ground OSC1, OSC2 Crystal connection for on chip oscillator RST External Reset, bidirectional IRQ1/VPP, IRQ2 External Interrupt Request IRQ1 is also the EPROM programming power pin CGND\EVSS Clock Ground VDDA Clock Generation Module Power Supply CGMXFC External Filter Capacitor for Clock Generation Module

MC68HC708XL36 MEMORY MAP I/O Registers (80 Bytes) $0000 – $004F Port A - H $0000 $000F  Registers RAM (1024) Bytes $0050 – $044F $0010 $0012  Unused (27,056 Bytes) $0450 – $6DFF SPI Registers EPROM (36,864 Bytes $6E00 – $FDFF $0013 $0019  SCI Registers SIM Break Status Register $FE00 SIM Reset Status Register $FE01 XIRQ $001A $001B Reserved (1 Byte) $FE02 Registers SIM Break Flag Control Reg. $FE03 $001C $001E  Reserved/Unimplemented $FE04 – $FE06 CGM Registers EPROM Control Reg. $FE07 $FFE0 - FFE1 IRQ2 Reserved (4 Bytes) $FE08 – $FE0B $FFE2 - FFE7 SCI Mask Option Reg $001F Break Addres Reg. High $FE0C $FFE8 - FFEB SPI Break Address Reg. Low $FE0D $0020 $0031  Break Status/Control Reg. $FE0E $FFEC - FFF5 TIM TIM Registers LVI Status/Control Reg. $FE0F Monitor ROM (240 Bytes) $FE10 – $FEFF $FFF6 - FFF7 DMA $FFF8 - FFF9 PLL Unused (192 Bytes) $FF00 – $FFBF $0032 $004E  DMA Registers $FFFA - FFFB IRQ1 Reserved (32 Bytes) $FFC0 – $FFDF $FFFC - FFFD SWI $FFE0 $FFFF  Vectors (32 Bytes) $FFFE - FFFF Reset Unused $004F COP Control Reg.