© 2000 Morgan Kaufman Overheads for Computers as Components CPUs: Memory System Mechanism zMicroprocessor clock rates are increasing zMemories are falling behind microprocessor clocks zCaches: Increase average performance of the memory system zMemory management: Perform address translation to provide a larger virtual memory space in a smaller physical memory

© 2000 Morgan Kaufman Overheads for Computers as Components Cache: To speed up memory access time CPU cache controller cache main memory data address data address Mediates between CPU and memory system (cache and main memory) Holds copies of some of the contents of main memory

© 2000 Morgan Kaufman Overheads for Computers as Components Cache operation zMany main memory locations are mapped onto one cache entry. zMay have caches for: yinstructions; ydata; ydata + instructions (unified). zMemory access time is no longer deterministic.

© 2000 Morgan Kaufman Overheads for Computers as Components Terms zCache controller sends memory requests: - If in cache  read from cache - If not  controller waits for value from memory and forwards it to CPU zCache hit: required location is in cache. zCache miss: required location is not in cache  victim?

© 2000 Morgan Kaufman Overheads for Computers as Components Memory system performance zh = cache hit probability zt cache = cache access time, t main = main memory access time. zAverage memory access time: yt av = ht cache + (1-h)t main ~5ns ns (DRAM)

© 2000 Morgan Kaufman Overheads for Computers as Components Multiple levels of cache CPU L1 cache L2 cache May also be on-chip memory Off-chip memory: Larger but slower

© 2000 Morgan Kaufman Overheads for Computers as Components Multi-level cache access time zh 1 = cache hit rate. zh 2 = rate for miss on L1, hit on L2. zAverage memory access time: yt av = h 1 t L1 + h 2 t L2 + (1- h 2 -h 1 )t main

© 2000 Morgan Kaufman Overheads for Computers as Components Memory management units z Logical address vs physical address z Example- Rabbit 16 bit microprocessor: x64k logical address space (16 bit), x1Mb physical address space (20 bit) z MMU translates 16bit logical address to 20 bit physical address

© 2000 Morgan Kaufman Overheads for Computers as Components Z180: 3 registers CBAR (common/bank address register, CBR common base register), BBR (bank base register) Root memory BIOS (Flash) Extended memory FFFFF 0000 FFFF commbank E CBR BBR CBAR Root code grows from here up Root data grows from here down Physical memory Point to physical memory Added to CBR/BBR

© 2000 Morgan Kaufman Overheads for Computers as Components MMU zMemory management unit (MMU): Translates addresses between CPU and Physical Memory (memory mapping) zEarly computers used MMU to compensate for limited address space in instruction set zFor modern CPUS’s MMU is used for “virtual addressing”

© 2000 Morgan Kaufman Overheads for Computers as Components … Memory management units zMemory management unit (MMU) translates addresses: CPU main memory management unit logical address physical address Multiple programs Secondary Storage for virtual memory swapping data RAM address

© 2000 Morgan Kaufman Overheads for Computers as Components Memory management tasks zAllows programs to move in physical memory during execution. zOne can change physical program location by changing MMU’s tables  No data/code change zAllows virtual memory: ymemory images kept in secondary storage; yimages returned to main memory on demand during execution.

© 2000 Morgan Kaufman Overheads for Computers as Components Address translation zRequires some sort of register/table to allow arbitrary mappings of logical to physical addresses. zTwo basic schemes: ySegmented: large, arbitrary sized region of memory yProgram fragmentation: Program scattered around physical memory yPaged: small equally sized regions zSegmentation and paging can be combined (x86): Segmented, paged scheme.

© 2000 Morgan Kaufman Overheads for Computers as Components Segments and pages memory segment 1 segment 2 page 1 page 2 Uniform size: Simplifies hardware Specified by: Start Address + Size Physical memory

© 2000 Morgan Kaufman Overheads for Computers as Components Segment address translation segment base addresslogical address range check physical address + range error segment lower bound segment upper bound Currently active segment Extracted from an instruction

© 2000 Morgan Kaufman Overheads for Computers as Components Page address translation Pages are small: 512-4k page numberoffset pageoffset page i base concatenate Logical address Physical address