7 th 高能物理学会大会, 李小男, 高能物理研究所 1 大亚湾反应堆中微子实验 触发和数据获取系统 李小男, IHEP On behalf of 触发 : 清华大学 DAQ:IHEP

7 th 高能物理学会大会, 李小男, 高能物理研究所 2 sin 2 2   Measurement at reactors νeνe νeνe νeνe νeνe νeνe νeνe Distance (L) Probability ν e meters Unoscillated flux observed here Well understood, isotropic source of electron anti-neutrinos Oscillations observed as a deficit of ν e sin 2 2θ 13 νeνe νeνe νeνe νeνe νeνe νeνe Detectors are located underground to shield against cosmic rays. πE ν /2Δm 2 13

7 th 高能物理学会大会, 李小男, 高能物理研究所 3 Dayabay Reactor Neutrino Experiment 900 m 292 m 465 m 810 m 607 m Total Tunnel length ~ 3000 m

7 th 高能物理学会大会, 李小男, 高能物理研究所 4 Detecting  e Inverse  -decay in 0.1% Gd-doped liquid scintillator Antineutrino signal, algorithm implemented in offline or on online computer farm –Time coincidence –Energy correlated

7 th 高能物理学会大会, 李小男, 高能物理研究所 5 Requirements of readout electronics Readout board designed for all detector systems except RPC. Neutrino detector: –Charge measurement Dynamic range for each PMT: 0 PE PE –50 p.e is the maximum for a neutrino event –~500 p.e. for through-going muons resolution: 1 p.e, 400 p.e. Noise < 0.1 p.e. Digitization time(mainly shaping time) < 1  s –Timing measurement: To determine event time and event vertex dynamic range: 0 ~ 500 ns resolution: < 500 ps Muon detector: –Water pool: Same requirements as neutrino detector –Water Tracker: Hit and/or charge RPC: BESIII electronics

7 th 高能物理学会大会, 李小男, 高能物理研究所 6 Readout board diagram On board calibration circuit 16 Channel inputs TDC algorithm: Gray counters

7 th 高能物理学会大会, 李小男, 高能物理研究所 7 Trigger requirement Good background rejection power rate can go to ~KHz rate limited by DAQ capabilities (hopefully < 10 MB/s/module) Low threshold ( T+3  < 1MeV ) –Record prompt positron signals and delayed signals from the neutrino interactions. –Record the background to enable background analysis. High and well known efficiency Flexibility (to fight backgrounds), same trigger board for different detector. –FPGA –Daughter card Reliability (to reduce systematic errors) Independency, Separate trigger for each of neutrino module, and each of muon detector, water pool, water cenrenkov module and RPC. Redundancy (to measure the trigger efficiency) Provide a system clock

7 th 高能物理学会大会, 李小男, 高能物理研究所 8 Algorithms Central trigger: OR of the following two –Energy: total charge > 15 PE –Multiplicity: > 15 PMT fired Veto trigger: OR of the following two –RPC: > two hits in any plane (Scin. > 1 hits ) –Water: > few PMT fired Prompt and delayed sub-event triggered and recorded independently, time correlation offline Central and veto events triggered and recorded independently, time correlation offline No dead-time induced. Trigger rate is limited by electronics recover time and by DAQ bandwidth. Trigger type: –Primary physics trigger –LED –Radioactive source –Periodic trigger –Muon trigger

7 th 高能物理学会大会, 李小男, 高能物理研究所 9 PMT dark current rate PMT max. number: 200 PMT dark current rate:50k Integration windows:100ns

7 th 高能物理学会大会, 李小男, 高能物理研究所 10 Trigger rate DetectorEvent Trigger Rate Occ.Ch size (bits) DBLAFar  e Module Cosmic-μ36x222x21.2x4 100%224*64 Rad.50x2 50x4 PoolCosmic-μ %340(252)*64 TrackerCosmic-μ %8*64 RPC Cosmic-μ %7650(5040)*1 Rad.&Noise Site totalskB/s

7 th 高能物理学会大会, 李小男, 高能物理研究所 11 Trigger board One board per module Same hardware design for central and veto board Each trigger board can handle up to 256 PMTs Decision time: → Readout event buffer depth –Multiplicity trigger based on FPGA: ~ 200 ns –Energy trigger based on total charge : ~ 300 ns ? System clock + Local clock

7 th 高能物理学会大会, 李小男, 高能物理研究所 12 Trigger scheme

7 th 高能物理学会大会, 李小男, 高能物理研究所 13 Timing Each site has a master clock to synchronize the veto and central modules A GPS time/1 PPS/10 kHz reference will be delivered to each site for an absolute time stamp If GPS can not be used, we can use a local clock, a problem for Supernova studies. Precision: GPS time ~ 100 ns. Time-stamp precision level 25ns. Each trigger board have a local clock for self trigger and testing. Mid-site DYBLA FAR

7 th 高能物理学会大会, 李小男, 高能物理研究所 14 DAQ block diagram

7 th 高能物理学会大会, 李小男, 高能物理研究所 15 Data acquisition & online control VME based front-end hardware, Motorola PowerPC controller RT-Linux RTOS: TimeSys Co. LinuxLink Back-end Linux PC. Software based on BES-III/Atlas Framework Each detector system and each neutrino module at each site is readout (trigger) independently. –8 antineutrino streams and 9 muon streams. Event reassembled using timestamp offline. –One neutrino module → One VME crate. –Water pool → One VME crate (near), Two VME crates (far). –Water Cerenkov Module system: TWO VME crates. Communication: –Copper between trigger-FEE –Twisted cable between PowerPC and readout computer –Optical between site-site/site-surface.

7 th 高能物理学会大会, 李小男, 高能物理研究所 16 Data acquisition and online control Online control –Local online control in each detector hall: each detector system has its own online control. Detector debugging and commissioning in parallel. –Global online control in surface room: Operate and monitor all detector system. Data storage: –Data throughout: 1.5MB/s. → 0.4TB/day (safety factor of 3). –Local tapes –Local disks Data transfer: –Tapes from DYB to IHEP or to Shenzhen Uni. –A data link from Shenzhen Uni. to IHEP via network can be discussed A data center at IHEP to be established. Raw data or processed data tapes will be copied and shipped to other data centers in the world, or distributed via GRID.

7 th 高能物理学会大会, 李小男, 高能物理研究所 17 One Readout VME crate

7 th 高能物理学会大会, 李小男, 高能物理研究所 18 Status Simple version of readout boards and trigger board are successfully running on the prototype. We are working on the 2nd version of readout board and trigger board We finished conceptual design of DAQ DAQ group is formed and begin to work on the project