Android is a trademark of Google Inc. Use of this trademark is subject to Google Permissions. Linux® is the registered trademark of Linus Torvalds in the.

Slides:



Advertisements
Similar presentations
Mentor.com/embedded Android is a trademark of Google Inc. Use of this trademark is subject to Google Permissions. Linux is the registered trademark of.
Advertisements

Using MapuSoft Instead of OS Vendor’s Simulators.
Secure Operating Systems Lesson 2: OS Fundamentals.
Dynamic Thread Assignment on Heterogeneous Multiprocessor Architectures Pree Thiengburanathum Advanced computer architecture Oct 24,
Multiprocessors— Large vs. Small Scale Multiprocessors— Large vs. Small Scale.
Lecture 6: Multicore Systems
Sazid Zaman Khan.  1. Desktop Systems – computer system dedicated to a single user.  ■ I/O devices – keyboards, mice, display screens, small printers.
TM Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, t he Energy Efficient Solutions logo, mobileGT, PowerQUICC, QorIQ,
High Performance Embedded Computing © 2007 Elsevier Lecture 15: Embedded Multiprocessor Architectures Embedded Computing Systems Mikko Lipasti, adapted.
Project Overview 2014/05/05 1. Current Project “Research on Embedded Hypervisor Scheduler Techniques” ◦ Design an energy-efficient scheduling mechanism.
DEPARTMENT OF COMPUTER ENGINEERING
Chapter Hardwired vs Microprogrammed Control Multithreading
Modern trends in computer architecture and semiconductor scaling are leading towards the design of chips with more and more processor cores. Highly concurrent.
Figure 1.1 Interaction between applications and the operating system.
Android is a trademark of Google Inc. Use of this trademark is subject to Google Permissions. Linux is the registered trademark of Linus Torvalds in the.
Operating Systems CS208. What is Operating System? It is a program. It is the first piece of software to run after the system boots. It coordinates the.
ECE 510 Brendan Crowley Paper Review October 31, 2006.
Android An open handset alliance project Janice Garcia September 18, 2008 MIS 304.
@2011 Mihail L. Sichitiu1 Android Introduction Platform Overview.
Introduction to Android Platform Overview
Operating systems.
Multicore Software Development Kit (MCSDK) Training Introduction to the MCSDK.
Chapter 18 Multicore Computers
Beagleboard and Friends Nathan Gough. Hardware – OMAP3  Based around Texas Instruments OMAP3530 “Applications Processor”  OMAP3 Platform:  Arm Cortex-A8.
Multicore Software Development Kit (MCSDK) Training Introduction to the MCSDK.
Authors: Tong Li, Dan Baumberger, David A. Koufaty, and Scott Hahn [Systems Technology Lab, Intel Corporation] Source: 2007 ACM/IEEE conference on Supercomputing.
CPU Scheduling - Multicore. Reading Silberschatz et al: Chapter 5.5.
OpenMP in a Heterogeneous World Ayodunni Aribuki Advisor: Dr. Barbara Chapman HPCTools Group University of Houston.
Silberschatz, Galvin and Gagne ©2009 Operating System Concepts – 8 th Edition, Chapter 2: System Structures.
© 2005 Mercury Computer Systems, Inc. Yael Steinsaltz, Scott Geaghan, Myra Jean Prelle, Brian Bouzas,
Embedded Streaming Media with GStreamer and BeagleBoard
ESA/ESTEC ADCSS 2013 Oct 22-24th, 2013 MultiPARTES FP7 Project MultiPARTES: Virtualization of Heterogeneous Multicore Salvador Trujillo Alfons Crespo Juan.
Chapter 2: Operating-System Structures. 2.2 Silberschatz, Galvin and Gagne ©2005 Operating System Concepts – 7 th Edition, Jan 14, 2005 Operating System.
3G Single Core Modem A New Telecommunications Device Group 4: Warren Irwin, Austin Beam, Amanda Medlin, Rob Westerman, Brittany Deardian.
Symmetric multiprocessing
Multicore Systems CET306 Harry R. Erwin University of Sunderland.
1 Presenter: Min Yu,Lo 2015/10/9 Lauri Matilainen, Erno Salminen, Timo D. Hamalainen, and Marko Hannikainen International Conference on Embedded.
April 2000Dr Milan Simic1 Network Operating Systems Windows NT.
4/18/14 1 That was the year that was in Linux Pacific Northwest National Laboratories April 18, 2014 Rick Lindsley IBM Linux Technology Center
Chapter 2 Operating System Overview
Scott Ferguson Section 1
Multiple Processors Real- time Operating System IEOS proposal R 蔡偉哲 R 李俊融.
Floating Point Numbers & Parallel Computing. Outline Fixed-point Numbers Floating Point Numbers Superscalar Processors Multithreading Homogeneous Multiprocessing.
HyperThreading ● Improves processor performance under certain workloads by providing useful work for execution units that would otherwise be idle ● Duplicates.
Linux C6x Syslink. 1.What is Syslink? 2.Syslink Architecture 3.SharedRegion 4.What is Syslink-c6x? 5.Syslink-c6x Features 6.Syslink-c6x Dependency 7.Demo.
Using Industry Standards to Exploit the Advantages and Resolve the Challenges of Multicore Technology September 19, 2007 Markus Levy, EEMBC and Multicore.
Kernel Synchronization in Linux Uni-processor and Multi-processor Environment By Kathryn Bean and Wafa’ Jaffal (Group A3)
System Programming Basics Cha#2 H.M.Bilal. Operating Systems An operating system is the software on a computer that manages the way different programs.
Page 1 2P13 Week 1. Page 2 Page 3 Page 4 Page 5.
By Adam Reimel. Outline Introduction Platform Architecture Future Conclusion.
This courseware is copyrighted © 2016 gtslearning. No part of this courseware or any training material supplied by gtslearning International Limited to.
The World Leader in High Performance Signal Processing Solutions Heterogeneous Multicore for blackfin implementation Open Platform Solutions Steven Miao.
Dual Identity Devices By: Tony Peadick By: The Breakdown What is a dual identity device Why they were designed and who needs one How they work Availability.
Chip Level Multithreading (CMT) By:- Tanveer Ahmed.
Thread & Processor Scheduling CSSE 332 Operating Systems Rose-Hulman Institute of Technology.
INTRODUCTION TO HIGH PERFORMANCE COMPUTING AND TERMINOLOGY.
Presented by: Saurabh Kumar Sinha (MRT07UGBIT 186) IT VII Semester, Shobhit University Meerut.
Visit for more Learning Resources
Thread & Processor Scheduling
CA Final Project – Multithreaded Processor with IPC Interface
chapter 6- Android Introduction
Welcome: Intel Multicore Research Conference
CPU Scheduling – Multiprocessor
Texas Instruments TDA2x and Vision SDK
CMPE419 Mobile Application Development
Dynamically Reconfigurable Architectures: An Overview
Multi Core Processing What is term Multi Core?.
Android Introduction Platform Mihail L. Sichitiu.
CMPE419 Mobile Application Development
Presentation transcript:

Android is a trademark of Google Inc. Use of this trademark is subject to Google Permissions. Linux® is the registered trademark of Linus Torvalds in the U.S. and other countries. Colin Walls Interprocessor Communications and MCAPI

Mentor Graphics Confidential Information Agenda Multicore introduction MCAPI introduction MCAPI concepts MCAPI API MCAPI implementation Conclusions

Mentor Graphics Confidential Information Agenda Multicore introduction MCAPI introduction MCAPI concepts MCAPI API MCAPI implementation Conclusions

Mentor Graphics Confidential Information Embedded Multicore Designs using multiple cores are becoming common –multiple cores on a chip –multiple chips on a board –any combination Two hardware architectures: –homogenous – multiple identical cores –heterogeneous – multiple cores of different types Broadly two software architectures: –SMP – Symmetrical MultiProcessing –AMP – Asymmetrical MultiProcessing

Mentor Graphics Confidential Information Symmetrical Multiprocessing - SMP Single OS instance running on homogenous cores Nucleus SMP Multicore Processor Core 1 Core N Application Thread 1 Thread M Nucleus Middleware

Mentor Graphics Confidential Information Asymmetrical Multiprocessing - AMP Multiple OS instances running on heterogeneous or homogenous cores Multicore Processor Core 1 Core N Linux Application 1 Thread 1 Thread M Application 2 Thread 1 Thread m Nucleus AndroidMiddleware MCAPI

Mentor Graphics Confidential Information Multicore Architectures HeterogeneousHomogeneous AMP SMP

Mentor Graphics Confidential Information Current Multicore Processors Heterogeneous devices –OMAP2 – ARM + DSP –OMAP3 – ARM + DSP + Accelerators –OMAP4 – (ARM x 2) + DSP + Accelerators Homogeneous devices –Marvell – ARM x 2 –ARM Cortex-A9 MPCore – ARM x 4 –Freescale QorIQ – PPC x 8 –MIPS 1004K – MIPS32 x 4

Mentor Graphics Confidential Information Mentor Embedded To view the rest of this free presentation, including MCAPI concepts, API and implementation, visit Mentor Embedded.visit Mentor Embedded.