16-1 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Chapter Sixteen MOSFET Digital Circuits
16-2 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure 16.6 Voltage transfer characteristics, NMOS inverter with resistor load, for three resistor values
16-3 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure 16.8 (a) NMOS inverter with saturated load and (b) driver transistor characteristics and load curve
16-4 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure 16.9 Voltage transfer characteristics, NMOS inverter with saturated load, for three aspect ratios
16-5 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure (a) NMOS inverter with depletion load, (b) current-voltage characteristic of depletion load, and (c) driver transistor characteristics and load curve
16-6 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure Voltage transfer characteristics, NMOS inverter with depletion load, for three aspect ratios
16-7 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure Voltage transfer characteristics of NMOS inverters with and without the body effect (a) enhancement load and (b) depletion load
16-8 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure Composite width-to-length ratios of driver transistors in two- input NMOS logic configurations (a) NOR and (b) NAND
16-9 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure NMOS logic circuit example
16-10 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure CMOS inverter
16-11 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure Complete voltage transfer characteristics, CMOS inverter
16-12 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure Square root of inverter current versus input voltage, CMOS inverter biased at either V DD = 5V or V DD = 10V
16-13 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure (a) Two-input CMOS NOR logic circuit and (b) truth table
16-14 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure (a) Two-input CMOS NAND logic circuit and (b) truth table
16-15 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure Complete CMOS design for Example 16.12
16-16 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure Clocked CMOS logic circuit (a) AND function and (b) OR function
16-17 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure NMOS R-S flip-flop
16-18 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure CMOS R-S flip-flop
16-19 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure Basic random access memory architecture
16-20 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure CMOS RAM cell including PMOS pull-up transistors
16-21 McGraw-Hill Copyright © 2001 by the McGraw-Hill Companies, Inc. All rights reserved. Figure Complete circuit diagram of a CMOS RAM cell with write and read circuitry