HCL and ALU תרגול 10. Overview of Logic Design Fundamental Hardware Requirements – Communication: How to get values from one place to another – Computation.

Slides:



Advertisements
Similar presentations
Kuliah Rangkaian Digital Kuliah 7: Unit Aritmatika
Advertisements

Modular Combinational Logic
Introduction So far, we have studied the basic skills of designing combinational and sequential logic using schematic and Verilog-HDL Now, we are going.
Mohamed Younis CMCS 411, Computer Architecture 1 CMCS Computer Architecture Lecture 7 Arithmetic Logic Unit February 19,
1 Seoul National University Logic Design. 2 Overview of Logic Design Seoul National University Fundamental Hardware Requirements  Computation  Storage.
David O’Hallaron Carnegie Mellon University Processor Architecture Logic Design Processor Architecture Logic Design
Cosc 2150: Computer Organization Chapter 3: Boolean Algebra and Digital Logic.
Fall 2005 L15: Combinational Circuits Lecture 15: Combinational Circuits Complete logic functions Some combinational logic functions –Half adders –Adders.
The Logic Machine We looked at programming at the high level and at the low level. The question now is: How can a physical computer be built to run a program?
Computer Structure - The ALU Goal: Build an ALU  The Arithmetic Logic Unit or ALU is the device that performs arithmetic and logical operations in the.
Fall 2007 L15: Combinational Circuits Lecture 15: Combinational Circuits Complete logic functions Some combinational logic functions –Half adders –Adders.
Arithmetic-Logic Units CPSC 321 Computer Architecture Andreas Klappenecker.
Computer ArchitectureFall 2008 © August 20 th, Introduction to Computer Architecture Lecture 2 – Digital Logic Design.
CS:APP CS:APP Chapter 4 Computer Architecture Control Logic and Hardware Control Language CS:APP Chapter 4 Computer Architecture Control Logic and Hardware.
Lecture # 12 University of Tehran
Arithmetic logic unit (ALU)
 Arithmetic circuit  Addition  Subtraction  Division  Multiplication.
Chapter 3 Digital Logic Structures. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-2 Building Functions.
CS 352 : Computer Organization and Design University of Wisconsin-Eau Claire Dan Ernst Constructing a Computer Creating a general purpose computing device.
Quiz # 2 Chapters 4, 5, & 6.
Binary Numbers.
Logical Circuit Design Week 8: Arithmetic Circuits Mentor Hamiti, MSc Office ,
Digital Computer Concept and Practice Copyright ©2012 by Jaejin Lee Logic Circuits I.
+ CS 325: CS Hardware and Software Organization and Architecture Combinational Circuits 1.
CS1Q Computer Systems Lecture 9 Simon Gay. Lecture 9CS1Q Computer Systems - Simon Gay2 Addition We want to be able to do arithmetic on computers and therefore.
Using building blocks to make bigger circuits
Copyright 1995 by Coherence LTD., all rights reserved (Revised: Oct 97 by Rafi Lohev, Oct 99 by Yair Wiseman, Sep 04 Oren Kapah) IBM י ב מ 10-1 The ALU.
Chapter 6-1 ALU, Adder and Subtractor
ECE 3110: Introduction to Digital Systems Chapter 6 Combinational Logic Design Practices Adders, subtractors, ALUs.
Chap 4. Sequential Circuits
1/8/ L3 Data Path DesignCopyright Joanne DeGroat, ECE, OSU1 ALUs and Data Paths Subtitle: How to design the data path of a processor.
1 Seoul National University Logic Design. 2 Overview of Logic Design Seoul National University Fundamental Hardware Requirements  Computation  Storage.
CPS3340 COMPUTER ARCHITECTURE Fall Semester, /05/2013 Lecture 4: Basics of Logic Design Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER.
Designing an ALU Taken from various sources Primary source: Digital Design and Computer Architecture by Harris &Harris.
1 Arithmetic Logic Unit ALU. 2 The Bus Concept 3 CPU Building Blocks  Registers (IR, PC, ACC)  Control Unit (CU)  Arithmetic Logic Unit (ALU)
Arithmetic Logic Unit (ALU) Anna Kurek CS 147 Spring 2008.
מבנה מחשב תרגול 2. 2 Boolean AND Operation Truth Table Equivalent Gate Different notations:
4. Computer Maths and Logic 4.2 Boolean Logic Logic Circuits.
Digital Logic. 2 Abstractions in CS (gates) Basic Gate: Inverter IO IO GNDI O Vcc Resister (limits conductivity) Truth Table.
CDA 3101 Fall 2013 Introduction to Computer Organization The Arithmetic Logic Unit (ALU) and MIPS ALU Support 20 September 2013.
Lecture 18: Hardware for Arithmetic Today’s topic –Intro to Boolean functions (Continued) –Designing an ALU 1.
Half Adder & Full Adder Patrick Marshall. Intro Adding binary digits Half adder Full adder Parallel adder (ripple carry) Arithmetic overflow.
Logic and computers 2/6/12. Binary Arithmetic /6/ Only two digits: the bits 0 and 1 (Think: 0 = F, 1.
Computer Architecture Carnegie Mellon University
CS:APP3e CS:APP Chapter 4 Computer Architecture Logic Design CS:APP Chapter 4 Computer Architecture Logic Design CENG331 - Computer Organization Murat.
Logic Design / Processor and Control Units Tony Diep.
Chapter 3 Digital Logic Structures. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-2 Transistor: Building.
Combinational Circuits
1 Fundamentals of Computer Science Combinational Circuits.
May 9, 2001Systems Architecture I1 Systems Architecture I (CS ) Lab 5: Introduction to VHDL Jeremy R. Johnson May 9, 2001.
Arithmetic-Logic Units. Logic Gates AND gate OR gate NOT gate.
LECTURE 4 Logic Design. LOGIC DESIGN We already know that the language of the machine is binary – that is, sequences of 1’s and 0’s. But why is this?
1 Lecture 11: Hardware for Arithmetic Today’s topics:  Logic for common operations  Designing an ALU  Carry-lookahead adder.
Simple ALU  Half adder  Full adder  Constructing 4 bits adder  ALU does several operations  General ALU structure  Timing diagram of adder  Overflow.
1 The ALU l ALU includes combinational logic. –Combinational logic  a change in inputs directly causes a change in output, after a characteristic delay.
Explain Half Adder and Full Adder with Truth Table.
COMBINATIONAL AND SEQUENTIAL CIRCUITS Guided By: Prof. P. B. Swadas Prepared By: BIRLA VISHVAKARMA MAHAVDYALAYA.
ETE 204 – Digital Electronics Combinational Logic Design Single-bit and Multiple-bit Adder Circuits [Lecture: 9] Instructor: Sajib Roy Lecturer, ETE,ULAB.
Combinational Circuits
Lecture 11: Hardware for Arithmetic
Lecture 12 Logic Design Review & HCL & Bomb Lab
Seoul National University
Basics of digital systems
Basics Combinational Circuits Sequential Circuits Ahmad Jawdat
Fundamentals of Computer Science Part i2
CSE Winter 2001 – Arithmetic Unit - 1
Lecture 11: Hardware for Arithmetic
COMS 361 Computer Organization
Combinational Circuits
Introduction to the Architecture of Computers
Presentation transcript:

HCL and ALU תרגול 10

Overview of Logic Design Fundamental Hardware Requirements – Communication: How to get values from one place to another – Computation – Storage Bits are Our Friends – Everything expressed in terms of values 0 and 1 – Communication Low or high voltage on wire – Computation Compute Boolean functions – Storage Store bits of information

Digital Signals – Use voltage thresholds to extract discrete values from continuous signal – Simplest version: 1-bit signal Either high range (1) or low range (0) With guard range between them – Not strongly affected by noise or low quality circuit elements Can make circuits simple, small, and fast Voltage Time 0 1 0

HCL (hardware control language) HCL HCL - - A programming language used to develop and understand the control logic of processor architecture. - - Describes the control logic of different processor design. Logic Gate Types Logic Gate Types - - Logic gates are always active - Input →... time → output Voltage Time a b a && b Rising Delay Falling Delay

Combinational Circuits and HCL Combinational circuit Combinational circuit - - Combination of logic gates - Output cannot be connected together - Acyclic Combinational circuit to test for bit equality Combinational circuit to test for bit equality - The output will equal 1 when both inputs are 0, or both are 1. HCL code : Bool eq = (a && b) || (!a && !b)

Combinational Circuits and HCL Multiplexor - Sets a value depending on a control input signal - The output will equal a when s is 1, and b when s is 0. HCL code : Bool out = (s && a) || (!s && b)

Combinational Circuits and HCL HCL versus C - Change occurs over time - There is no real assignment, just assignment to expressions - Expressions cannot be partially evaluated Example: (a && !a) && func(b,c)

Combinational Circuits and HCL Word-level equality test circuit HCL code : Bool EQ = ( A == B)

Combinational Circuits and HCL Word-level multiplexor HCL (case expression) - 1 stands for default

Combinational Circuits and HCL Mux 4 int Out4 = [ !s1 && !s0 : A; !s1 : B; s1 && !s0 : C; 1 : D; ]; Min 3 int Min3 = [ A <= B && A <= C : A; B <= A && B <= C : B; 1 : C; ];

Arithmetic Logic Unit An arithmetic and logic unit (ALU) is a digital circuit that performs arithmetic and logical operations. The ALU is a fundamental building block of the Central Processing Unit of a computer, and even the simplest microprocessors contain one for purposes such as maintaining timers. The processors found inside modern CPUs and graphics processing units (GPUs) accommodate very powerful and very complex ALUs; a single component may contain a number of ALUs. 11

OF ZF CF OF ZF CF OF ZF CF OF ZF CF Arithmetic Logic Unit Combinational logic Continuously responding to inputs Control signal selects function computed Corresponding to 4 arithmetic/logical operations in Y86 Addition, Subtraction, AND, OR Also computes values for condition codes ALUALU Y X X + Y 0 ALUALU Y X X - Y 1 ALUALU Y X X & Y 2 ALUALU Y X X ^ Y 3 A B A B A B A B

The basic ALU provides the basic logical and arithmetic functions: AND, OR plus addition. Shift, multiplication and division are usually outside the basic ALU. Logical operations 1 bit logical unit for AND/OR operations select (AND or OR) result 0101 MUX abab Basic ALU (Combinational Circuit)

The ALU ALU includes combinational logic. – Combinational logic  a change in inputs directly causes a change in output, after a characteristic delay. – Different from sequential logic which only changes on the clock. Two major components of combinational logic are – multiplexors & decoders which we previously talked about c 3 X 8 multiplexor s1 s DECODER X 8 Decoder s0

abC in sumC out inputs outputs sum = (a  b  C in ) + (a  b  C in ) + (a  b  C in ) + (a  b  C in ) = a + b + C in C out =(b  C in ) + (a  C in ) + (a  b) = ((a + b)  C in ) + (a  b) abab C out C in Adder hardware for C out in 2 layers 1 bit FULL adder (3,2) ab C in C out sum Carry in Carry out

Full Adder from Half Adders Half adder Full adder from 2 half adders + or gate abab Cout sum Cin abab Cout sum

1 bit simple ALU for logical / arithmetic operations - does not yet include subtraction. abab select result Cin Cout 1 Bit Simple ALU

Enhanced for subtraction abab select result Cin Cout invert 1's complement For subtraction use Cin = 1 and inverse b subtraction: a + b + 1 = a + (b + 1) = a + (-b) = a - b Bit Enhanced ALU

Ripple Carry Type Adder To produce a 32 bit result, we connect 32 single bit units together. This type of ALU adder is called a ripple adder – Carry bits are generated in sequence. – Bit 31 result and Cout is not correct until it receives Cin from previous unit, which is not correct until it receives Cin from its previous unit, etc. – Total operation time is proportional to word size (here 32). a0 b0 result 0 Cin Cout Cin ALU0 Cout Cin ALU1 Cout Cin ALU2 Cout Cin ALU31 Cout a1 b1 a2 b2 a31 b31 result 1 result 2 result operation = invert + select 32 bit ADDER with ripple carry: 3