Advanced Digital Circuits ECET 146 Week 5 Professor Iskandar Hack ET 221B, 481-5733

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Presentation transcript:

Advanced Digital Circuits ECET 146 Week 5 Professor Iskandar Hack ET 221B,

This Week’s Goals Introduction to the concept of Hierarchical Design Techniques Designing a circuit with multiple projects

Hierarchical Design Techniques Also called Top-Down Design A design technique that allows a project to be broken into a series of smaller projects Each subdesign is developed and tested separately The overall design is then assembled using either Text Design Techniques or by connecting the subdesigns in the graphical editor (preferred method for this course)

Design a four-bit full adder using Hierarchal Techniques Create a project for FourBitAdder Create a new Block Diagram File called ha.bdf Enter Design for HA (find circuit in ECET 111 Book) Create Default symbol (do not compile – you get an error) simulate project HA Create a new Block Diagram File called FA.bdf Enter Design for FA (find circuit in ECET 111 Book) Create Default symbol (do not compile – you get an error) Create a new Block Diagram called FourBitAdder (this will be your top level design) Insert a half adder and three full adders, and connect as done in ECET 11 Simulate full design These circuits can be found on pages in ECET 111 textbook

Enter Design for Half Adder Half Adder Enter the design using Input Output XOR AND2

Create Default Symbol This step creates a schematic symbol that can be used in other designs

Default Symbol for Half Adder

Full Adder Repeat process for the Full Adder that you did for the Half Adder

Default Symbol for Full Adder

Draw Four-Bit Adder Open Graphical Editor and add the symbols ha and 4-fa’s and connect them as shown with inputs and outputs similar as shown on page 238 in Kleitz Note – All files MUST be in the same directory on the drive!!! Do not put ha, fa and fourbitadder in different directories.

Fourbitadder drawing

Save, Compile, Define Device and Pins After drawing the fourbitadder save it as a new file (fourbitadder.bdf) Set as Top-Level Enity Compile Set Device as before to EP2C20F484C7 Define input pins and output pins Tri-State all unused Pins Recompile after making assignments!!!

Pin Assignments

Simulation Simulate as before (sample shown)

Simulate Save the file as fourbitadder.scf and simulate Glitches because of propagation delays

Lab 4 Implement an 4-Bit adder as discussed in Week 5’s Lecture Simulate the design Use SW0-3 for A and SW4-7 for input B Output the sum on the LEDs Either show the working project to the instructor or record a short video